1. Presented by: Divya Muppaneni
Portable Compiler Optimisation Across Embedded Programs and Micro-architectures using Machine Learning
Christophe Dubach Grigori Fursin Michael F.P. O’Boyle
Timothy M.Jones INRIA Saclay University of
Edwin V. Bonilla Edinburgh
University of Edinburgh
Presented by: Divya Muppaneni
Dept of Computer & Information Sciences
University of Delaware

2. Motivation Compiler Optimization
It is the process of tuning the output of a compiler to minimize or maximize some attribute of an executable computer program.
Difficulties in building an optimizing compiler

3. Portable Compiler Addressing the problem
Developing a portable optimizing compiler
Approach
Machine Learning

4. Model
Generating the Training data

5. Model(Contd) Building the Model
To learn the model we need to fit a probability distribution over good optimization passes to each training program/micro-architecture.
Input Output
Arch Desc M Perf Cntr P Prob.Dist for Opts

6. Experimental Setup Benchmark MiBench Microarchitecture Space
35 MiBench programs
Microarchitecture Space
XScale processor
200 micro-architectural configurations
Compiler Optimisation Space
1000 different optimizations

7. Characterising the compiler space
Distribution of the maximum speedup available across all micro-
architectures on a per –program basis.

8. Evaluation Methodology
Cross Validation
Leave-one-out cross validation
Best Performance Achievable

9. Evaluation Methodology
Program/Microarchitecture Optimisation Space

10. Evaluation Methodology
Evaluation Across Programs

11. Evaluation Methodology
Evaluation Across Microarchitectures

12. Results
Program Impact on Optimisations

13. Results(Contd)
Microarchitecture Impact on Optimisations

14. Results(Contd)
Extending the Microarchitectural Space

15. Conclusion Conclusion Future Work Reduce the training cost.
Average speedup of 1.16X over the highest default optimization level across the 200 micro-architectural configurations was achieved.
Future Work
Reduce the training cost.

17. THANK YOU