1. CMOS半導體製程概念
INVERTER

2. Inverter Process Steps
P-SUBSTRATE
(a) field oxide etching

3. Inverter Process Steps
P-SUBSTRATE
N-WELL
(b) N-well diffusion

4. Inverter Process Steps
P-SUBSTRATE
N-WELL
(c) field oxide etching

5. Inverter Process Steps
P-SUBSTRATE
N-WELL
(d) gate oxidation

6. Inverter Process Steps
P-SUBSTRATE
N-WELL
(e) polysilicon definition

7. Inverter Process Steps
P-SUBSTRATE
N-WELL p+
(f) n-plus diffusion n+ n+

8. Inverter Process Steps
(g) p-plus diffusion
P-SUBSTRATE
N-WELL n+ p+ n+ n+ p+ p+

9. Inverter Process Steps
P-SUBSTRATE
N-WELL n+ p+
(h) oxide growth n+ n+ p+ p+

10. Inverter Process Steps
P-SUBSTRATE
N-WELL n+ p+
(i) contact cuts n+ n+ p+ p+

11. Inverter Process Steps
(j) metal
N-WELL n+ p+
P-SUBSTRATE n+ n+ p+ p+

12. Simplified CMOS Inverter Process
cut line
n type substrate - p well/tub
n well

13. Ｎ-Well Mask
After p-well use implants to adjust VTn

14. Active Mask
Grown thick oxide. Then use active mask to create thin oxide layers over the active areas – where we are going to place the transistors (source, gate, and drain areas)

15. Poly Mask
First used chemical deposition to deposit polysilicon on wafer.
Note thin oxide area for gate oxide - critical (helps determine Vth) doe 0.25 micron technology -> 6.5 to 5.5 microns thick

16. Ｎ+ Select Mask
Followed by diffusion (ion implant) to build pfets source and drain areas

17. Ｐ+ Select Mask
Followed by diffusion (ion implant) to build nfets source and drain areas

18. Contact Mask
After deposition of SiO2 insulator, then contact holes are etched (in this case to make contacts to source and drain regions)

19. Metal Mask 62 processing steps for a double/twin tub CMOS process!!
tanqueray.eecs.berkeley.edu/~ehab/inv.html

20. Layout
Inverter佈局繪製動畫說明圖例
P substrate
poly
wafer
n well