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Codification of Flip Chip Knowledge

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Presentation on theme: "Codification of Flip Chip Knowledge"— Presentation transcript:

1 Codification of Flip Chip Knowledge
Good afternoon. Antonio Prats March 2002

2 Objective Facilitate practical applications of research results
Design optimization Specs Materials selection Product specific process development Trouble shooting

3 Two Parts Yield Prediction Software Codification Documents
“Placement Yield” – in-plane variations “Assembly Yield” – out-of-plane variations Codification Documents “Underfill Codification” – Materials evaluation and underfill process design “Reflow Encapsulant Codification” – Materials evaluation and reflow encapsulant process design

4 Placement Yield Software
Goal Conservative estimate of defect levels associated with in-plane (primarily substrate) tolerances Defect A solder bump not in contact with its pad User Input Substrate layout, pad shapes and sizes, variations in size and location, mask thickness, bump dimensions, machine accuracy

5 Example Pad Design Screen

6 Example Thickness Consideration Screen

7 Assembly Yield Software
Goal Conservative estimate of defect levels associated with warpage, bump height variations, and solder collapse Defect A solder bump not in contact with its pad/paste Solder Bridging (New for 2001) User Input Bump locations and variations in bump height, pad diameters and thicknesses, paste volume, component and board warpage

8 Assembly Yield Software Screen

9 Underfill Codification Manual
Discussion of issues important to the underfill process Establishment of a materials knowledge base to save time during process development Procedures for process development Troubleshooting (to be expanded in 2002)

10 Table of Contents Largest sections are 4 and 7 1 INTRODUCTION
2 DISPENSER EVALUATION 2.1 Specific Flip Chip Issues 3 MATERIALS SELECTION 4 DATA BASE 4.1 Thaw 4.2 Flow & 'Gel' Times 4.3 Life 4.4 Flow Time Optimization 4.5 Fillet Thickness Dependence 4.6 Cure 4.7 Automatic Fillet Formation 4.8 Proximity Test 4.9 Bakeout Requirements 4.10 Diagnostic Tests (Reference Performance) 5 MATERIALS SPECIFIC EQUIPMENT CHARACTERIZATION 6 MATERIALS HANDLING 6.1 Substrates 6.2 Chips 6.3 Underfill Materials PRODUCT SPECIFIC PROCESS 7.1 Underfill Process 7.2 Bake 7.3 Standoff 7.4 Substrate Temperature 7.5 Preferred Fillet Thickness 7.6 Volumes 7.7 Dispensing 7.8 Final Flow Optimization 7.9 Footprint & Keep Out 7.10 Curing 7.11 Wetting & Voiding 7.12 SMT Process Integration 8 TROUBLESHOOTING 9 REFERENCES Largest sections are 4 and 7

11 Typical Correlation Between Nominal Dispensed Volume and Fillet Thickness

12 Taper Flow Experimental Setup
Clamp 0 mil 5 mil

13 Different Dispense Patterns

14 Reflow Encapsulant Codification Manual
Discussion of issues important to assembly with reflow encapsulants, with emphasis on differences from underfill process Establishment of a materials knowledge base to save time during process development Procedures for process development

15 Table of Contents INTRODUCTION DISPENSER EVALUATION
Board Handling Ease of programming, calibration (offsets) Vision System Pump Type Dispense Volume Control Uniformity and Precision Heating Cleaning Technical support Potential Alternatives: Stencil Printing MATERIAL EVALUATION Life Bakeout Dispensing Needle Size and Type Volume Dispense Voids Due to Substrate Features From High Shear Rate Absorption of Voids Placement Wetting Placement Force and Hold Time Placement Voiding Reflow Soldering Window Post Curing Statistics PROCESS DEVELOPMENT Repeatability of Volume/Fillet Thickness Dispense Pattern

16 Reflow Profiles for Testing Reflow Process Window

17 Some Possible Dispense Patterns

18 Summary Defect Prediction Programs Codification Documents
Design optimization Specs Codification Documents Equipment and materials evaluation Rapid product specific process design Troubleshooting


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