1. Asynchronous Logic Automata Analog Logic Automata
David Dalrymple
April 17, 2008 1

2. Asynchronous Logic Automata

3. Supercomputer

4. Supercomputer Code

5. Architecture

6. Cellular Microcode
Each cell a bit

7. Cellular Microcode
Each cell a bit

8. Logic CA
AND OR XOR NAND
Each processor a bit, each bit a processor.

9. Architecture is software.

10. Logic CA is synchronous
T=0
T=1
T=2
T=3

11. Asynchronous Logic Clocking keeps data in sync
Sometimes we care exactly when data is ready
Clocking everything wastes energy, time
Sometimes we don't care
Don't need clocks to synchronize
Asynchronous is just clever synchronization
Look at data dependencies

12. Asynchronous Logic
Traditional architectures have very complex data dependencies
Most asynchronous logic design has lived with these
“Globally asynchronous, locally synchronous”

13. Data dependencies local

14. Allow Inaction (0,1,X)

15. Charge conservation

16. Consequences of ALA Power savings from Active elements everywhere
Clocking
Charge conservation
Flexible interconnect
Fan-out, fan-in free
No impedance issues
Active elements everywhere
Propagate at gate delay
cm/10ns

17. ALA Simulator

18. (Work of Kailiang Chen)
Analog Logic Automata
(Work of Kailiang Chen) 20

19. Soft Computation using Analog Logic
Analog domain
random variable
Px (X=0) & Px (X=1)
Digital domain
each binary variable
{ 0 / 1 }

20. Example 2 -- Xor

23. 3x3 Array Layout 25