1. Liaison Report February 2011
North America 3DS-IC Committee (Three-dimensional Stacked Integrated Circuits)
Liaison Report
February 2011

2. Outline Leadership Organization Chart Meeting Information
Task Force Updates
February 2011
NA 3DS-IC Committee

3. Leadership Committee Co-chairs Urmi Ray (Qualcomm)
Andy Rudack (SEMATECH)
Chris Moore (Semilab)
February 2011
NA 3DS-IC Committee

4. Organization Chart NA 3DS-IC Committee Wafer Bonded Stacks TF
C: Urmi Ray (Qualcomm)
C: Andy Rudack (SEMATECH)
C: Chris Moore (Semilab)
Wafer Bonded Stacks TF
L: Andy Rudack (SEMATECH)
Inspection & Metrology TF
L: Chris Moore (Semilab)
Thin Wafer Handling TF
L: Urmi Ray (Qualcomm)
February 2011
NA 3DS-IC Committee

5. Meeting Information Last meeting Next meeting
January 12, 2011 (kick-off meeting) Via teleconference/web meeting
Next meeting
March 29 for NA Spring 2011 Meetings San Jose, California
February 2011
NA 3DS-IC Committee

6. NA 3DS-IC Committee Kick-off Meeting Held Jan 12 via teleconference/web meeting
Attendance
37 participants
Companies represented include:
Amkor, Applied Materials, ASE, Brooks Automation, Corning, DISCO, eda 2 asic, Entegris, eSilicon, EVG, ITRI, KLA-Tencor, Lasertec, Miraial, Nitto Denko, Olympus, Qualcomm, SEMATECH, Semilab, Sharp, SUMCO, TI
Discussed formation of three (3) proposed task forces
Wafer Bonded Stacks TF
Inspection & Metrology TF
Thin Wafer Handling TF
February 2011
NA 3DS-IC Committee

7. Task Force Updates 3DS-IC Wafer Bonded Stacks TF
Approved late January 2011
Charter:
The BWS Task Force will actively create and/or modify specifications that reflect bonded wafer stacks parameters and the wafer bonding process.
Scope:
Identify new wafer parameters that reflect adequate ranges for bonded wafer stacks
Modify/create document to reflect adequate ranges for bonded wafer stacks
Identify other SEMI standards that are adversely affected by BWS parameters
Update referenced standards: create/modify standards to reflect BWS parameters
February 2011
NA 3DS-IC Committee

8. Task Force Updates 3DS-IC Wafer Bonded Stacks TF (cont’d)
First meeting held February 23
Presentation on 3D lessons learned
Discussion on 3D standards gap associated with bonded wafer pairs
Members tasked to submit standardization proposals for consideration
Target SNARF (Standards New Activity Report Form) submission at NA Spring 2011 meetings
Next TF meeting
March 9 via teleconference/web meeting to prioritize standardization proposals
February 2011
NA 3DS-IC Committee

9. Task Force Updates 3DS-IC Inspection & Metrology TF
Approved late January 2011
Charter:
Develop standards for metrology and inspection methods to be used in measuring the properties of TSV’s, bonded wafer stacks, and dies used in the 3DS-IC manufacturing process.
Scope:
Examples of needed standards include (but are not limited to):
TSV physical properties (i.e., depth, top, bottom CD, side wall, etc.)
Bonded wafer stack properties (i.e., overlay, bond inspection)
Defect metrology
Dies
Next Meeting:
Early March 2011
February 2011
NA 3DS-IC Committee

10. Task Force Updates 3DS-IC Thin Wafer Handling TF
Approved late January 2011
Charter:
Develop standards for reliable handling and shipping of thin wafers, dies (e.g., Micro-pillar Grid array -MPGA) used in 3DS-IC high-volume manufacturing (HVM)
Define thin wafer handling requirements including physical interfaces used in 3DS-IC manufacturing
Define shipping requirements, including packaging, reliability, and other relevant criteria. This will also include MPGA ship/handle requirements
February 2011
NA 3DS-IC Committee

11. Task Force Updates 3DS-IC Thin Wafer Handling TF (cont’d) Scope:
Formulate a common set of requirements and prioritize critical areas for standardization, resulting in a short-list of required standards (inspection, shipping etc) in the topics listed below. Other topics may be added based on additional inputs
Thin wafer and Die Shipping related activities:
Examples: Shipping carriers for thin wafer (wafer cassette, box or frame), Shipping carrier for dies (MPGA), Reliability Test methods
Transportation vibration testing
Drop-shock
Other – new tests?
Thin wafer handling-related activities:
Examples: Process and Metrology Tools and Test methods
Whole wafer inspection for damage (crack, break etc)Macro level
Damage to features – microbump, pad etc micro level
Universal carrier concept
Automation
February 2011
NA 3DS-IC Committee

12. Task Force Updates 3DS-IC Thin Wafer Handling TF (cont’d)
First meeting held February 16
Companies represented: Amkor, ASE, Brooks, Corning, Elpida, Intel, SEMATECH, SUSS, TOK
Reviewed and finalized TF charter and scope
Discussed which existing SEMI Standards can be leveraged for wafer spec and handling
Next TF meeting
TBD, via teleconference/web meeting
February 2011
NA 3DS-IC Committee

13. NA 3DS-IC Spring 2011 Meeting Schedule [DRAFT]
Tuesday, March 29 at SEMI HQ in San Jose, CA
Wafer Bonded Stacks TF (8:00 AM to 12:00 noon)
Inspection & Metrology TF (8:00 AM to 12:00 noon)
Thin Wafer Handling TF (8:00 AM to 12:00 noon)
NA 3DS-IC Committee (1:00 PM to 5:00 PM)
February 2011
NA 3DS-IC Committee

14. Thank You!
For more information or participate in any NA 3DS-IC activities, please contact Paul Trio at SEMI
February 2011
NA 3DS-IC Committee

15. Participating Companies
Albany Nanotech
Altera
AMD
Amkor
ANjAY Technology
Applied Materials
ASE
Attoscopy
Brooks Automation
Corning
DAETEC
Dynaloy
Entegris
EVG
Fraunhofer
GlobalFoundries
IBM
IMEC
Intel
ITRI
Lasertec
Maxim
Metryx
MoSys
Neocera
Olympus-ITA
Planarity
Qualcomm
Raytex
Rudolph Technologies
Samsung
Sematech
Semilab
SigmaTech
Soitec
Sonix
SUSS
Tamar Technology
TechSearch TerePac
Tezzaron
TOK America
TSMC
WaferMasters
February 2011
NA 3DS-IC Committee

16. SEMI Staff Contacts
James Amano Director, SEMI International Standards +1 (408) 943 – 7977
Paul Trio Sr. Manager, North America Standards Operations +1 (408) 943 – 7041
February 2011
NA 3DS-IC Committee