1. Power improvement in the multitasking environment
Power Reduction Through Measurement and Modeling of Users and CPUs
Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik and Robert P. Dick Department of EECS, Northwestern University {b-lin, arindam, pdinda, g-memik,
Our work targets power reduction in laptops. Almost all of them use a version of DVFS (Dynamic Voltage and Frequency Scaling). DVFS is an energy-saving technique that consists of varying the frequency and voltage of a microprocessor in real-time according to processing needs. Specifically, existing DVFS techniques select an operating point (CPU frequency and voltage) based on the utilization of the processor.
User-driven Frequency Scaling (UDFS)
Process-driven Voltage Scaling (PDVS)
Current DVFS techniques are pessimistic about the user
Most DVFS schemes (e.g., Windows) is only based on CPU utilization
Leads to use of higher frequencies than necessary for satisfactory performance
Different users have different requirements!
Current DVFS techniques are pessimistic about the processor
Assume worst-case manufacturing process variation and operating temperature
Voltage set for a particular frequency based on loose worst-case bounds given by the processor manufacturer.
Leads to higher voltages than necessary for stable operation, especially in low temperatures.
User-driven Frequency Scaling (UDFS)
User presses button when annoyed with speed of computer
Button-press feedback drives model & algorithm that drive frequency setting
System adapts to users quickly, leading to a reduced rate of button presses
Two adaptive algorithms
Example: minimum stable Vdd for different operating frequencies & temperatures in an IBM Laptop
Minimum Stable Voltage (MSV)
Supply voltage that guarantees correct execution for given processing and environmental conditions.
Processors can act flawlessly at lower supply voltages. The extra slack is present due to process variation and temperature.
Process-driven Voltage Scaling (PDVS)
Customize frequency to voltage mapping to individual processor at every temperature, taking advantage of process variation.
An automatic voltage profiler is under development
UDFS1 scheme
UDFS2 scheme
User study
Results (UDFS + PDVS)
% improvement
4 interaction applications: Windows, Microsoft PowerPoint plus music, 3D Shockwave animation video, and FIFA 2005
20 users: “Power User”, “Typical User”, and “Beginner”
2 adaptive algorithms: UDFS1 and UDFS2.
PowerPoint Apps
PowerPoint App
Average number of user events
Measurement
3D Shockwave
Used a control agent in Windows to log system frequency and User events during the study
Built a framework to measure the power consumption of a notebook while replaying the user study scenario.
Power numbers presented are original savings- not analytical improvements
3D Shockwave
FIFA game
Summary of results
Combination of PDVS and the best UDFS scheme reduces measured system power by 49.9% (27.8% PDVS, 22.1% UDFS), averaged across 20 users and 4 representative applications, compared to the Windows XP DVFS scheme.
For multitasking environment, power consumption gets reduced by 58.6% and 75.7% by (UDFS1+PDVS) and (UDFS2+PDVS).
Average temperature reductions for all three applications – 13.2◦C.
This work is in process of technical transfer
FIFA game
% improvement
Runs a program to detect the MSV settings for a particular process
Analyses the effect of temperature on the MSV
Runs a stability test occasionally to review the reliability of the processor
“User-Driven Frequency Scaling”, IEEE Computer Society Computer Architecture Letters, 2006.
“Process and User Driven Dynamic Voltage and Frequency Scaling”, Tech. Report NWU-EECS-06-11, EECS Department, Northwestern Univ., Aug
"Power Reduction Through Measurement and Modeling of Users and CPUs", ACM SIGMETRICS 2007
Publications:
Chebyshev bound-based (1 − p) values for difference of means from zero are also shown
Power improvement in the multitasking environment