1. Measuring plane efficiencies
Giuseppe E Bruno
Università di Bari and INFN - Italy
Outline
Aim of such a measurement
A look into the CMS “framework”
A first proposal

2. Plane efficiencies: what’s for ?
from data to a paper
data taking  raw data
reconstruction  ESD  standard AOD
analysis:
standard AOD user AOD
selection of candidates
computation of corrections for acceptance and reconstruction inefficiencies
application (e.g., with a deconvolution) of the corrections (and flux factors for normalisation) to the raw distributions to get the physical distributions
estimate of the systematics errors (here corrections always play a role)
writing of the paper
09/12/2018
G. Bruno P.B. meeting

3. Plane efficiencies: what’s for ?
computation of corrections for acceptance and reconstruction inefficiencies
A framework is being developed for this
S. Arcelli (Bologna), I. Kraus (CERN),
A. Mastroserio (Bari), R. Vernet (Catania)
This framework relies on the Monte Carlo simulation
(AliRoot); the detector response functions are an ingredient
of the simulation
09/12/2018
G. Bruno P.B. meeting

4. Plane efficiencies: what’s for ?
In order to compute properly the corrections, the Monte Carlo description of our detectors should be as realistic as possible.
fast simulation (digits created according to tables of probabilities  “plane efficiencies”)
response models driven by physics (e.g. in ITS, the Gaussian diffusion, plus coupling effects, etc.)
Can be
used in
few cases,
and for
systematic
errors
evaluation
Advantages: fast, history (deterioration) of the detectors reproduced naturally
Drawbacks: poor description of the detector spatial precision,
digit correlations ?, some analyses sensitive to the chosen granularity
for eff. determination
Standard
case
The measured plane efficiencies would be THE REFERENCES of the models
09/12/2018
G. Bruno P.B. meeting

5. The aim of this work is to measure the efficiencies of the layers used for tracking, with the tracks themself
ITS is the goal
Eventually, the framework would be extended to other detectors (TRD, TOF, …)
TPC would do it differently (not using tracks)
Of course, each layer will be divided in basic blocks (e.g., the chip for SPD)
An estimate of the “Plane efficiency” can be done also looking at the map of hits (i.e. the distribution of digits)
It will give the relative efficency within a block
I exspect it to be one of the QA measurements
09/12/2018
G. Bruno P.B. meeting

6. A look into CMS code
It is not a “framework”, they have a code for cosmics
CMS basically has one type of detector for tracking: the silicon micro-strips (the 3 pixel layers neither have been installed nor are in the code for plane efficiency)
Their basic block is one module: barrel 8K, tot.15K
A space point is searched to be compatible with the track prediction, obtained without the detector under study
To avoid border ambiguities, only tracks impacting on the 92% (TIB) and 87% (TOB) innermost area of the detectors are considered  the resulting efficiency is extrapolated to the full detector
09/12/2018
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7. The Method Track RecHit all RecHit S Eff = S+B
The Layer under study is removed from the tracking
The interpolation of the track on that layer is used to evaluate in which module the hit is expected.
The “all rec hit collection” is used to evaluate if the hit is in the expected module (S) or not (B).
Track RecHit
all RecHit S
S+B
Eff =
The layer under
study is removed
from the tracking

8. Further constraints to evaluate efficiency
To evaluate the module efficiency the active area of the modules has been reduced to avoid “artificial” inefficiency due to the uncertainty to the module assignment in the border of active area and in the bonding region.
TIB modules
TOB Modules
Bonding
~3 mm
~5mm
~3 mm
~10mm
Area considered for
modules

9. A look into CMS
The innermost tracking is accomplished with three layers of silicon pixel detectors (at radii of 4.4, 7.3 and 10.2 cm) with a total area of approximately 1m2, composed of 66M 100×150μm2 area pixels. The remaining tracking layers are composed of 9.3M single- and double-sided silicon microstrip detectors covering a total of 200m2 of detectors, organised in an inner barrel (TIB) with 4 layers within the 20–50 cm radius range, an outer barrel (TOB) with 6 layers within the cm radius range, and two endcap detectors (TEC and TID).
09/12/2018
G. Bruno P.B. meeting

10. A first proposal for ALICE ITS
The plane efficiency will be measured, using high quality tracks by removing one layer at the time from the tracker
In AliITSTrackerV2 such a functionality was foreseen
Implementing it in AliITSTrackerMI is under study
At the moment the tracker is aware only of unsensitive regions: those get assigned “virtual rec-points” (Q=0)
The tracker is still not aware about dead/bad channels (to be read from DB)
Proposal: a unique tool to “remove” regions from a layer; e.g. dead channels, unsensitive regions, the full layer.
09/12/2018
G. Bruno P.B. meeting

11. A first proposal for ALICE ITS
I’m assuming to have access to the rec-points but not to the raw digits (this may have an influence for the SSD, if we want a resolution better than module by module)
The basic blocks (granularity) should be defined according to advices from detector experts and PWGs, taking into account the required statistics for evaluating the efficiencies within a given tollerance
(an estimates available in the next slides)
The output (efficiency tables) would be written into the DB for periods of validity
framework functionality: automatic update when needed
Dead and noisy channels:
not a goal of this work
the framework aware of them
09/12/2018
G. Bruno P.B. meeting

12. Proposal for SPD
D. Elia (Ba)
Plane efficiency to be avaluated chip by chip with a statistical error of 0.5%
Number of required high quality tracks by assuming Eff=90%
layer 1: 400 chips  1.8M
layer 2: 800 chips  3.5M
09/12/2018
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13. Proposal for SDD layer 3: layer 4:
F. Prino (To)
layer 3:
14 ladders
1 ladder=6 detector
tot. 84 detector
layer 4:
22 ladders
1 ladder=8 detector
tot. 176 detector
each detector divided in 8(chips)*2(drift direction)
layer 3: 1344 zones
layer 4: 2288 zones
 6.0M tracks
 10.2M tracks
quite demanding !
09/12/2018
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14. Proposal for SSD layer 5: 34(ladders)*22=748 modules
E.Fragiacomo (Ts)
layer 5: 34(ladders)*22=748 modules
layer 6: 38(ladders)*25=950 modules
1 module=6(p-side)+6(n-side)=12 chips
There is not simple segmentation if we want to go finer than the module
chip by chip ?
too many elements (layer 6: 11400) !
stereo geometry: how to share the inefficiency between n- and p–sides ?
The module looks the most reasonable choice
09/12/2018
G. Bruno P.B. meeting

15. Proposed segmentation
pixel: chip by chip n. of tracks (M)
layer 1: 400 zones  1.8
layer 2: 800 zones  3.5
drift: chip by chip (/2)
layer 3: 672 zones (6.0)
layer 4: 1144 zones (10.2)
strip: module by module
layer 5: 748 zones 3.3
layer 6: 950 zones 4.2
about 2 (4) M events (assuming 3 good tracks/event)
needed for evaluating the ITS efficiency (relative error 0.5%)
09/12/2018
G. Bruno P.B. meeting

16. Proposal for ITS
The measured Eff. will be used as reference for the response function
as an overall factor, if the response model is 100% efficiency
as the reference to tune the response model, if not
For special analyses and (eventually) for systematic error evaluation
fast simulation: the “chip” (module) efficiencies are the probabilities to have a digit
sub-chip (sub-module) efficiencies (e.g. pixel by pixel for the SPD) may be obtained by combining the chip_by_chip efficiency (from this framework) and the hit maps (from QA ?).
09/12/2018
G. Bruno P.B. meeting

17. Conclusions ? I would appreciate your feedback 09/12/2018
G. Bruno P.B. meeting

18. SPD: relative track occupancy
Assuming
Vertex_z=0
144 mm
144 mm
SPD2
76mm
SPD1
39mm
At the border:
SPD1
SPD2
09/12/2018
G. Bruno P.B. meeting

19. SPD regions uncovered by tracking
39mm
6.5
7.0
r=3.9cm
6.5
SPD1
SPD1: 4
12.0
r=7.6cm 4
SPD2
SPD2:
09/12/2018
G. Bruno P.B. meeting