1. Instructor: Alexander Stoytchev
CprE 281: Digital Logic
Instructor: Alexander Stoytchev

2. Multiplexers CprE 281: Digital Logic Iowa State University, Ames, IA
Copyright © Alexander Stoytchev

3. Administrative Stuff
HW 6 is due today

4. 2-1 Multiplexer (Definition)
Has two inputs: x1 and x2
Also has another input line s
If s=0, then the output is equal to x1
If s=1, then the output is equal to x2

5. Graphical Symbol for a 2-1 Multiplexer
[ Figure 2.33c from the textbook ]

6. Truth Table for a 2-1 Multiplexer
[ Figure 2.33a from the textbook ]

7. Let’s Derive the SOP form

8. Let’s Derive the SOP form

9. Let’s Derive the SOP form
Where should we
put the negation signs?
s x1 x2
s x1 x2
s x1 x2
s x1 x2

10. Let’s Derive the SOP form
s x1 x2
s x1 x2
s x1 x2
s x1 x2

11. Let’s Derive the SOP form
s x1 x2
s x1 x2
s x1 x2
s x1 x2
f (s, x1, x2) =
s x1 x2 +

12. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +

13. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +
f (s, x1, x2) =
s x1 (x2 + x2)
s (x1 +x1 )x2 +

14. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +
f (s, x1, x2) =
s x1 (x2 + x2)
s (x1 +x1 )x2 +
f (s, x1, x2) =
s x1
s x2 +

15. Circuit for 2-1 Multiplexers
(c) Graphical symbol
(b) Circuit
f (s, x1, x2) =
s x1
s x2 +
[ Figure 2.33b-c from the textbook ]

16. More Compact Truth-Table Representation1
(a)
Truth
table s x1 x2
f (s, x1, x2) 1
f (s, x1, x2) s x1 x2
[ Figure 2.33 from the textbook ]

17. 4-1 Multiplexer (Definition)
Has four inputs: w0 , w1, w2, w3
Also has two select lines: s1 and s0
If s1=0 and s0=0, then the output f is equal to w0
If s1=0 and s0=1, then the output f is equal to w1
If s1=1 and s0=0, then the output f is equal to w2
If s1=1 and s0=1, then the output f is equal to w3

18. Graphical Symbol and Truth Table
[ Figure 4.2a-b from the textbook ]

19. The long-form truth table

20. The long-form truth table[

21. 4-1 Multiplexer (SOP circuit)
f = s1 s0 w0 + s1 s0 w1 + s1 s0 w2 + s1 s0 w3
[ Figure 4.2c from the textbook ]

22. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexerw w 1 1 f 1 w 2 w 3 1
[ Figure 4.3 from the textbook ]

23. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

24. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

25. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

26. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexerw0 w1 s1 f s0 w2 w3

27. That is different from the SOP form of the 4-1 multiplexer shown below, which uses less gates

28. 16-1 Multiplexer s f w [ Figure 4.4 from the textbook ] 1 3 4 2 7 8 113 4 7 12 15 2 f
[ Figure 4.4 from the textbook ]

29. Synthesis of Logic Circuits
Using Multiplexers

30. 2 x 2 Crossbar switch s x y x y [ Figure 4.5a from the textbook ] 1 1

31. 2 x 2 Crossbar switch
s=0 x y 1 1 x y 2 2
s=1 x y 1 1 x y 2 2

32. Implementation of a 2 x 2 crossbar switch with multiplexers1 y 1 1 s x 2 y 2 1
[ Figure 4.5b from the textbook ]

33. Implementation of a 2 x 2 crossbar switch with multiplexers

34. Implementation of a 2 x 2 crossbar switch with multiplexersy1 y2

35. Implementation of a logic function with a 4x1 multiplexer2 1 2 w 1 1 1 1 f 1 1 1 1 1
[ Figure 4.6a from the textbook ]

36. Implementation of the same logic function with a 2x1 multiplexer1 w 2 1 1 1 w w 2 2 1 1 f 1 1
(b) Modified truth table
(c) Circuit
[ Figure 4.6b-c from the textbook ]

37. The XOR Logic Gate
[ Figure 2.11 from the textbook ]

38. The XOR Logic Gate
[ Figure 2.11 from the textbook ]

39. Implemented with a multiplexer
The XOR Logic Gate
Implemented with a multiplexer f

40. Implemented with a multiplexer
The XOR Logic Gate
Implemented with a multiplexer x f y

41. Implemented with a multiplexer
The XOR Logic Gate
Implemented with a multiplexer x f y
These two circuits are equivalent
(the wires of the bottom AND gate are flipped)

42. all four of these are equivalent!
In other words,
all four of these are equivalent! x y f x y f w 2 w 1 x y f 1 f 1

43. Implementation of another logic functionw w w f 1 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.7a from the textbook ]

44. Implementation of another logic functionw w w f 1 2 3 w w f 1 2 1 w 1 3 1 w 1 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.7a from the textbook ]

45. Implementation of another logic functionw w w f 1 2 3 w w f 1 2 1 w 1 3 1 w 1 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
(a) Modified truth table w 2 w 1 w 3 f 1
(b) Circuit
[ Figure 4.7 from the textbook ]

46. Another Example (3-input XOR)

47. Implementation of 3-input XOR with 2-to-1 Multiplexers1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.8a from the textbook ]

48. Implementation of 3-input XOR with 2-to-1 Multiplexers1 1 w Å w 2 3 1 1 1 1 1 1 1 1 w Å w 2 3 1 1 1 1 1 1
[ Figure 4.8a from the textbook ]

49. Implementation of 3-input XOR with 2-to-1 Multiplexers1 1 w Å w w 2 3 2 w 1 1 1 1 1 w 3 1 1 f 1 1 w Å w 2 3 1 1 1 1 1 1
(a) Truth table
(b) Circuit
[ Figure 4.8 from the textbook ]

50. Implementation of 3-input XOR with a 4-to-1 Multiplexer2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.9a from the textbook ]

51. Implementation of 3-input XOR with a 4-to-1 Multiplexer2 3 w 3 1 1 1 1 w 3 1 1 1 1 w 3 1 1 1 1 w 3 1 1 1 1
[ Figure 4.9a from the textbook ]

52. Implementation of 3-input XOR with a 4-to-1 Multiplexer2 3 w 3 w 1 1 2 w 1 1 1 w 3 w 1 1 3 1 1 f w 3 1 1 1 1 w 3 1 1 1 1
(a) Truth table
(b) Circuit
[ Figure 4.9 from the textbook ]

53. Multiplexor Synthesis Using Shannon’s Expansion

54. Three-input majority functionw w w f 1 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.10a from the textbook ]

55. Three-input majority functionw w w f 1 2 3 w f 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.10a from the textbook ]

56. Three-input majority functionw w w f 1 2 3 w f 1 1 w w 2 3 1 1 w + w 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1
[ Figure 4.10a from the textbook ]

57. Three-input majority functionw w w f 1 2 3 w f 1 1 w w 2 3 1 1 w + w 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 1
(b) Truth table w w 1 2 w 3 f
[ Figure 4.10 from the textbook ]
(b) Circuit

58. Three-input majority functionw w 1 2 w 3 f

59. Shannon’s Expansion Theorem
Any Boolean function can be rewritten in the form:

60. Shannon’s Expansion Theorem
Any Boolean function can be rewritten in the form:

61. Shannon’s Expansion Theorem
Any Boolean function can be rewritten in the form:
cofactor
cofactor

62. Shannon’s Expansion Theorem
(Example)

63. Shannon’s Expansion Theorem
(Example)
(w1 + w1)

64. Shannon’s Expansion Theorem
(Example)
(w1 + w1)

65. Shannon’s Expansion Theorem (In terms of more than one variable)
This form is suitable for implementation with a 4x1 multiplexer.

66. Another Example

67. Factor and implement the following function with a 2x1 multiplexer

68. Factor and implement the following function with a 2x1 multiplexer

69. Factor and implement the following function with a 2x1 multiplexer
[ Figure 4.11a from the textbook ]

70. Factor and implement the following function with a 4x1 multiplexer

71. Factor and implement the following function with a 4x1 multiplexer

72. Factor and implement the following function with a 4x1 multiplexer
[ Figure 4.11b from the textbook ]

73. Yet Another Example

74. Factor and implement the following function using only 2x1 multiplexers

75. Factor and implement the following function using only 2x1 multiplexers

76. Factor and implement the following function using only 2x1 multiplexers

77. Factor and implement the following function using only 2x1 multiplexers

78. Factor and implement the following function using only 2x1 multiplexers

79. Factor and implement the following function using only 2x1 multiplexers

80. Factor and implement the following function using only 2x1 multiplexersw3 w2 h w3 1 w2

81. Finally, we are ready to draw the circuitg w3 w2 f g h w1 h w3 1 w2

82. Finally, we are ready to draw the circuitg w3 w2 h 1 f w1

83. Finally, we are ready to draw the circuit2 1 w 3 f 1
[ Figure 4.12 from the textbook ]

84. Questions?

85. THE END