1. Chapter 2 Instructions: Language of the Computer
박능수

2. Instruction Set The repertoire of instructions of a computer
Different computers have different instruction sets
But with many aspects in common
Early computers had very simple instruction sets
Simplified implementation
Many modern computers also have simple instruction sets

3. The MIPS Instruction Set
Used as the example throughout the book
Stanford MIPS commercialized by MIPS Technologies
Large share of embedded core market
Applications in consumer electronics, network/storage equipment, cameras, printers, …
Typical of many modern ISAs
See MIPS Reference Data tear-out card, and Appendixes B and E

4. Arithmetic Operations
The University of Adelaide, School of Computer Science
10 December 2018
Arithmetic Operations
Add and subtract, three operands
Two sources and one destination
add a, b, c # a gets b + c
All arithmetic operations have this form
Design Principle 1: Simplicity favours regularity
Regularity makes implementation simpler
Simplicity enables higher performance at lower cost
Chapter 2 — Instructions: Language of the Computer

5. The University of Adelaide, School of Computer Science
10 December 2018
Arithmetic Example
C code:
f = (g + h) - (i + j);
Compiled MIPS code:
add t0, g, h # temp t0 = g + h add t1, i, j # temp t1 = i + j sub f, t0, t1 # f = t0 - t1
Chapter 2 — Instructions: Language of the Computer

6. The University of Adelaide, School of Computer Science
10 December 2018
Register Operands
Arithmetic instructions use register operands.
MIPS has a 32 × 32-bit register file.
Use for frequently accessed data
Numbered 0 to 31
32-bit data called a “word”
Assembler names
$t0, $t1, …, $t9 for temporary values
$s0, $s1, …, $s7 for saved variables
Design Principle 2: Smaller is faster
c.f. main memory: millions of locations
Chapter 2 — Instructions: Language of the Computer

7. Register Operand Example
The University of Adelaide, School of Computer Science
10 December 2018
Register Operand Example
C code:
f = (g + h) - (i + j);
f, …, j in $s0, …, $s4
Compiled MIPS code:
add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1
Chapter 2 — Instructions: Language of the Computer

8. The University of Adelaide, School of Computer Science
10 December 2018
Memory Operands
Main memory used for composite data
Arrays, structures, dynamic data
To apply arithmetic operations
Load values from memory into registers
Store result from register to memory
Memory is byte addressed
Each address identifies an 8-bit byte
Words are aligned in memory
Address must be a multiple of 4
MIPS is Big Endian
Most-significant byte at least address of a word
c.f. Little Endian: least-significant byte at least address
Chapter 2 — Instructions: Language of the Computer

9. Byte Addresses
Since 8-bit bytes are so useful, most architectures address individual bytes in memory
Alignment restriction - the memory address of a word must be on natural word boundaries (a multiple of 4 in MIPS-32)
Big Endian: leftmost byte is word address
IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA
Little Endian: rightmost byte is word address
Intel 80x86, DEC Vax, DEC Alpha (Windows NT)
msb
lsb
little endian byte 0
big endian byte 0

10. Memory Operand Example 1
The University of Adelaide, School of Computer Science
10 December 2018
Memory Operand Example 1
C code:
g = h + A[8];
g in $s1, h in $s2, base address of A in $s3
Compiled MIPS code:
Index 8 requires offset of 32
4 bytes per word
lw $t0, 32($s3) # load word add $s1, $s2, $t0
offset
base register
Chapter 2 — Instructions: Language of the Computer

11. Memory Operand Example 2
The University of Adelaide, School of Computer Science
10 December 2018
Memory Operand Example 2
C code:
A[12] = h + A[8];
h in $s2, base address of A in $s3
Compiled MIPS code:
Index 8 requires offset of 32
lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word
Chapter 2 — Instructions: Language of the Computer

12. The University of Adelaide, School of Computer Science
10 December 2018
Registers vs. Memory
Registers are faster to access than memory
Operating on memory data requires loads and stores
More instructions to be executed
Compiler must use registers for variables as much as possible
Only spill to memory for less frequently used variables
Register optimization is important!
Chapter 2 — Instructions: Language of the Computer

13. The University of Adelaide, School of Computer Science
10 December 2018
Immediate Operands
Constant data specified in an instruction
addi $s3, $s3, 4
No subtract immediate instruction
Just use a negative constant
addi $s2, $s1, -1
Design Principle 3: Make the common case fast
Small constants are common
Immediate operand avoids a load instruction
Chapter 2 — Instructions: Language of the Computer

14. The University of Adelaide, School of Computer Science
10 December 2018
The Constant Zero
MIPS register 0 ($zero) is the constant 0
Cannot be overwritten
Useful for common operations
E.g., move between registers
add $t2, $s1, $zero
Chapter 2 — Instructions: Language of the Computer

15. Representing Instructions
The University of Adelaide, School of Computer Science
10 December 2018
Representing Instructions
Instructions are encoded in binary
Called machine code
MIPS instructions
Encoded as 32-bit instruction words
Small number of formats encoding operation code (opcode), register numbers, …
Regularity!
Register numbers
$t0 – $t7 are reg’s 8 – 15
$t8 – $t9 are reg’s 24 – 25
$s0 – $s7 are reg’s 16 – 23
Chapter 2 — Instructions: Language of the Computer

16. Review: Unsigned Binary Representation
Hex
Binary
Decimal 0x
0…0000 0x
0…0001 1 0x
0…0010 2 0x
0…0011 3 0x
0…0100 4 0x
0…0101 5 0x
0…0110 6 0x
0…0111 7 0x
0…1000 8 0x
0…1001 9 …
0xFFFFFFFC
1…1100
0xFFFFFFFD
1…1101
0xFFFFFFFE
1…1110
0xFFFFFFFF
1…1111
bit weight
bit position
bit

17. Review: Signed Binary Representation
2’sc binary
decimal
1000 -8
1001 -7
1010 -6
1011 -5
1100 -4
1101 -3
1110 -2
1111 -1
0000
0001 1
0010 2
0011 3
0100 4
0101 5
0110 6
0111 7
-23 =
-(23 - 1) =
complement all the bits
0101
1011
and add a 1
and add a 1
0110
1010
complement all the bits =

18. The University of Adelaide, School of Computer Science
10 December 2018
Sign Extension
Representing a number using more bits
Preserve the numeric value
In MIPS instruction set
addi: extend immediate value
lb, lh: extend loaded byte/halfword
beq, bne: extend the displacement
Replicate the sign bit to the left
c.f. unsigned values: extend with 0s
Examples: 8-bit to 16-bit
+2: =>
–2: =>
Chapter 2 — Instructions: Language of the Computer

19. 3 Instruction Formats: all 32 bits wide
MIPS-32 ISA
Instruction Categories
Computational
Load/Store
Jump and Branch
Floating Point
coprocessor
Memory Management
Special
Registers
R0 - R31 PC HI LO op rs rt rd sa
funct
immediate
jump target
3 Instruction Formats: all 32 bits wide
R format
I format
J format

20. MIPS R-format Instructions
MIPS fields are given names to make them easier to refer to
op rs rt rd shamt funct
op 6-bits opcode that specifies the operation
rs 5-bits register file address of the first source operand
rt 5-bits register file address of the second source operand
rd 5-bits register file address of the result’s destination
shamt 5-bits shift amount (for shift instructions)
funct 6-bits function code augmenting the opcode

21. MIPS Arithmetic Instructions
MIPS assembly language arithmetic statement
add $t0, $s1, $s2
sub $t0, $s1, $s2
Each arithmetic instruction performs one operation
Each specifies exactly three operands that are all contained in the datapath’s register file ($t0,$s1,$s2)
destination  source1 op source2
Instruction Format (R format)
x22

22. MIPS Register File Holds thirty-two 32-bit registers Registers are
Two read ports and
One write port
Registers are
Faster than main memory
But register files with more
locations are slower (e.g., a 64
word file could be as much as
0% slower than a 32 word file)
Read/write port increase impacts speed quadratically
Easier for a compiler to use
e.g., (A*B) – (C*D) – (E*F) can do multiplies in any order vs. stack
Can hold variables so that
code density improves (since register are named with fewer bits than a memory location)
Register File
src1 addr
src2 addr
dst addr
write data
32 bits
src1
data
src2 32
locations 5
write control

23. Aside: MIPS Register Convention
Name
Register Number
Usage
Preserve on call?
$zero
constant 0 (hardware)
n.a.
$at 1
reserved for assembler
$v0 - $v1
2-3
returned values no
$a0 - $a3
4-7
arguments
yes
$t0 - $t7
8-15
temporaries
$s0 - $s7
16-23
saved values
$t8 - $t9
24-25
$gp 28
global pointer
$sp 29
stack pointer
$fp 30
frame pointer
$ra 31
return addr (hardware)

24. MIPS I-format Instructions
The University of Adelaide, School of Computer Science
10 December 2018
MIPS I-format Instructions op rs rt
constant or address
6 bits
5 bits
16 bits
Immediate arithmetic and load/store instructions
rt: destination or source register number
Constant: –215 to +215 – 1
Address: offset added to base address in rs
Design Principle 4: Good design demands good compromises
Different formats complicate decoding, but allow 32-bit instructions uniformly
Keep formats as similar as possible
Chapter 2 — Instructions: Language of the Computer

25. Two Key Principles of Machine Design
Instructions are represented as numbers and, as such, are indistinguishable from data
Programs are stored in alterable memory (that can be read or written to) just like data
Stored-program concept
Programs can be shipped as files of binary numbers – binary compatibility
Computers can inherit ready-made software provided they are compatible with an existing ISA – leads industry to align around a small number of ISAs

26. MIPS (RISC) Design Principles
Simplicity favors regularity
fixed size instructions
small number of instruction formats
opcode always the first 6 bits
Smaller is faster
limited instruction set
limited number of registers in register file
limited number of addressing modes
Make the common case fast
arithmetic operands from the register file (load-store machine)
allow instructions to contain immediate operands
Good design demands good compromises
three instruction formats

27. MIPS Memory Access Instructions
MIPS has two basic data transfer instructions for accessing memory
lw $t0, 4($s3) #load word from memory
sw $t0, 8($s3) #store word to memory
The data is loaded into (lw) or stored from (sw) a register in the register file – a 5 bit address
The memory address – a 32 bit address – is formed by adding the contents of the base address register to the offset value
A 16-bit field meaning access is limited to memory locations within a region of 213 or 8,192 words (215 or 32,768 bytes) of the address in the base register

28. Machine Language - Load Instruction
Load/Store Instruction Format (I format):
lw $t0, 24($s3)
Memory
data
word address (hex) 0x 0x 0x
0x c
0xf f f f f f f f
$s3 0x
$s3 = =
0x120040ac
0x120040ac
$t0

29. Aside: Loading and Storing Bytes
MIPS provides special instructions to move bytes
lb $t0, 1($s3) #load byte from memory
sb $t0, 6($s3) #store byte to memory
What 8 bits get loaded and stored?
load byte places the byte from memory in the rightmost 8 bits of the destination register
what happens to the other bits in the register?
store byte takes the byte from the rightmost 8 bits of a register and writes it to a byte in memory
what happens to the other bits in the memory word?
0x bit offset

30. MIPS Immediate Instructions
Small constants are used often in typical code
Possible approaches?
put “typical constants” in memory and load them
create hard-wired registers (like $zero) for constants like 1
have special instructions that contain constants !
addi $sp, $sp, 4 #$sp = $sp + 4
slti $t0, $s2, 15 #$t0 = 1 if $s2<15
Machine format (I format):
The constant is kept inside the instruction itself!
Immediate format limits values to the range +215–1 to -215
0x0A x0F

31. Aside: How About Larger Constants?
We'd also like to be able to load a 32 bit constant into a register, for this we must use two instructions
a new "load upper immediate" instruction
lui $t0,
Then must get the lower order bits right, use
ori $t0, $t0,

32. MIPS Shift Operations
Need operations to pack and unpack 8-bit characters into 32-bit words
Shifts move all the bits in a word left or right
sll $t2, $s0, 8 #$t2 = $s0 << 8 bits
srl $t2, $s0, 8 #$t2 = $s0 >> 8 bits
Instruction Format (R format)
Such shifts are called logical because they fill with zeros
Notice that a 5-bit shamt field is enough to shift a 32-bit value 25 – 1 or 31 bit positions
x00

33. MIPS Logical Operations
There are a number of bit-wise logical operations in the MIPS ISA
and $t0, $t1, $t2 #$t0 = $t1 & $t2
or $t0, $t1, $t2 #$t0 = $t1 | $t2
nor $t0, $t1, $t2 #$t0 = not($t1 | $t2)
Instruction Format (R format)
andi $t0, $t1, 0xFF00 #$t0 = $t1 & ff00
ori $t0, $t1, 0xFF00 #$t0 = $t1 | ff00
Instruction Format (I format)
x24
0x0D xFF00

34. The University of Adelaide, School of Computer Science
10 December 2018
NOT Operations
Useful to invert bits in a word
Change 0 to 1, and 1 to 0
MIPS uses NOR 3-operand instruction for NOT operation
a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero
Register 0: always read as zero
$t1
$t0
Chapter 2 — Instructions: Language of the Computer