1. ADS54J60EVM, TSW14J10EVM and KC705 Test

2. Test setup

3. ADS54J60
Test Setup:
Single tone is given as input to the device.
Test conditions:
Fs = internal Msps
Fin =150MHz on CHB only. The KC705 did not route the lanes used by CHA on the ADC EVM
LMF = 4211
TSW14J10 and KC705

4. Copy provided “ADS54J60_LMF_2211.ini” to location shown below

5. Using ADS54Jxx EVM GUI, load the following for the LMK

6. Next, select the file below to configure the ADS54J60 registers.

7. In LMK04828 Clock Outputs tab, change the following: 1
In LMK04828 Clock Outputs tab, change the following: 1. Change CLKout 0 and 1 DCLK Divider to 6 2. Change CLKout 12 and 13 DCLK Divider to Unselect Group Powerdown from CLKout 12 and Set CLKout 12 and 13 DCLK Type to “LVDS” GUI shall look as shown below

8. ADS54J60 CHB 150MHz IF

9. Open HSDC Pro GUI, select “ADS54J60_LMF_2211”, set the ADC Ouput Data Rate to M, then click on “Capture”.