1. FPGA Logic Synthesis using Quantified Boolean Satisfiability
Andrew C. Ling, Deshanand P. Singh, and Stephen D. Brown
University of Toronto, Canada
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LUT x0 … xn x0 … xn
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PLB f ? g
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1) FPGA: Programmable Logic Structures and Routing
2) Problem: Determine if a given cone of logic can fit into a programmable circuit.
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l0…lm x0…xn z0…zo (f ≡ g)
f = output of cone
g = output of programmable circuit
l = configuration bits
x = input signals
z = intermediate wire signals E A E
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4) Application 1: Technology mapping to
Programmable Logic Blocks
5) Application 2: Resynthesis
3) Does there exist a configuration to a circuit, such
that it can implement a given cone