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Computer Architecture and Organization: L02: Logic design Review

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Presentation on theme: "Computer Architecture and Organization: L02: Logic design Review"— Presentation transcript:

1 Computer Architecture and Organization: L02: Logic design Review
By: A. H. Abdul Hafez CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

2 Outlines Combinational circuits Sequential circuits Gates Multiplexers
Encoders/decoders D – Latches SR, JK flip flops Sequential circuits Registers Registers with parallel load Shift registers Serial communications Counters Binary counters BCD counters Synchronous counters CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

3 Combinational Circuits: Gates
The most elementary specification of the function of a Digital Logic Circuit is the Truth Table Table that describes the Output Values for all the combinations of the Input Values, called MINTERMS n input variables  2n minterms CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

4 Combinational Circuits: Multiplexers
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

5 Combinational Circuits: Encoder/ Decoder
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

6 Latches: SR CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

7 D - Latches CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

8 D and JK Flip flops CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

9 T Flip flops CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

10 Registers A register is a group of flip flops, each of which is capable of storing one bit of information. Clock inputs triggers all flip flops at the positive (rising) edge of each pulse. Clear input (low active) reset the all outputs to 0s. It must be 1 in normal operation. Four bits register CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

11 Register with parallel load
Transferring new information into the register is called loading the register. If all the bits of register are loaded simultaneously with a common clock pulse, the loading is called parallel load. To leave the content of the register unchanged, the input must held constant or the clock should be prohibited. The additional circuits play the role of MUX whose outputs drive data to the register either from the data bus or from the output of the register it self. CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

12 Shift register A register that is capable of shifting the binary data from its current cell to a neighbor cell. The logical configuration is a chain of flip flops. The output of one flip flop is connected to the input of the next flip flop. All flip flops are connected to a common clock. CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

13 Serial transfer CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

14 Counters Counter is a register that goes through a prescribed sequence of states upon the application of input pulses. The input pulses may be a clock pulses, or they may originate from some external source. In general they either occur at fixed regular interval of time or at random. A counter that follows the binary number sequence is called a binary counter. An n-bit binary counter consists of n flip flops and can count in binary from 0 to 2n -1. CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

15 Binary ripple Counters
A binary ripple counter consists of a series of complementing flip-flops with output of each flip-flop connected to the C input of the next higher order flip-flop. The flip-flop holding the least significant bit receives the incoming count pulses. CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018

16 BCD ripple counter CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

17 Synchronous counters CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
December 31, 2018

18 The end of the Lecture Thanks for your time Questions are welcome
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU December 31, 2018


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