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Details and Assumptions for Technology Requirements

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Presentation on theme: "Details and Assumptions for Technology Requirements"— Presentation transcript:

1 Details and Assumptions for Technology Requirements
ITRS 2003 Factory Integration Chapter Electrostatic Discharge - Backup Section Details and Assumptions for Technology Requirements 2019/1/1 ITRS Factory Integration TWG

2 ITRS Factory Integration TWG
Outline Problems Caused By Static Charge attraction of contamination electrostatic discharge (ESD) damage to devices and photomasks equipment malfunction due to ESD-generated electromagnetic interference (EMI) SEMI E129 – Guide to Assess and Control Electrostatic Charge in a Semiconductor Manufacturing Facility Conclusions 2019/1/1 ITRS Factory Integration TWG

3 Static Charge Problems: Contamination and ESD
Yield Throughput Reticles Equipment Contamination Process Interruptions Wafers Integrated Circuits ESD Damage Static Charge + --- -- FPD Screens Pellicles 2019/1/1 ITRS Factory Integration TWG

4 Forces on a Contaminant Particle Near Charged Surfaces
for 1000 V surfaces, the greatest force is electrostatic! gravitational aerodynamic Electrostatic 2019/1/1 ITRS Factory Integration TWG

5 Electrostatic Attraction 200mm vs. 300mm
positive neutral negative 0.000 0.005 0.010 0.015 0.020 0.025 0.030 Rate of Contaminating (/cm2-hr) 300 mm 200 mm Polarity Dependence of ESA at One Fab Particle deposition 3-6 times higher for wafers at 10kV Particle deposition 30-60% greater at 300mm than 200mm 2019/1/1 ITRS Factory Integration TWG

6 Device ESD Failure Mechanisms
Human Body Model human contact with a sensitive device Machine Model charged conductor contacting a sensitive device Charged Device Model device contacts ground when in an electric field device package is charged and device contacts ground 2019/1/1 ITRS Factory Integration TWG

7 Destruction of Silicon Due to ESD
2019/1/1 ITRS Factory Integration TWG

8 ESD Effects on Semiconductor Manufacturing
Photomask Damage Due to ESD 1.5 m 2019/1/1 ITRS Factory Integration TWG

9 ESD Events Create Electromagnetic Interference (EMI)
ESD Radiates Radio Waves and induces signals in microprocessors and metrology tools Scrambled Program Instructions Scrambled Data Confusing Error Messages Microprocessor Lockup Calibration Failures Apparent Software Bugs 2019/1/1 ITRS Factory Integration TWG

10 ITRS Factory Integration TWG
EMI Events in Photo Ratio - 30:1 2019/1/1 ITRS Factory Integration TWG

11 Semiconductor Equipment and Materials International (SEMI)
SEMI E129 :Guide to Assess and Control Electrostatic Charge in a Semiconductor Manufacturing Facility 2019/1/1 ITRS Factory Integration TWG

12 SEMI E129 Guide – Recommended Electrostatic Limits
Year Node Electrostatic Discharge, nC Electrostatic Field, V/cm V/inch 2000 180 nm 2002 130 nm 2003 100 nm 2.0 1.5 375 2004 90 nm 1.0 2007 65 nm 0.5 2009 50 nm 0.25 2012 32 nm 0.125 2015 25 nm 0.1 2019/1/1 ITRS Factory Integration TWG

13 ITRS Technical Requirements - Electrostatics
2002 2003 Note: 2003 changes shown in bold 2019/1/1 ITRS Factory Integration TWG

14 ITRS Factory Integration TWG
Conclusions Major elements of technology change are smaller device geometry, lower defect densities, larger wafers, faster equipment operating speeds, and more dependence on automation. All of these areas are adversely affected by the presence of static charge in the semiconductor factory. Static charge needs to be controlled before it becomes a barrier to new technology introduction, slows the ramping of new factories, or a costly learning experience. SEMI Standards is in the process of releasing E129 which contains electrostatic limits and measurement methods for the entire semiconductor facility. The technology requirements in the ITRS will solve the static problem in factory construction and in equipment design - before static charge can impact production. 2019/1/1 ITRS Factory Integration TWG


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