1. DMT 245 Introduction to Microcontroller
│ Lecture 5 │
8051 Assembly Language Programming (2)

2. In this Lecture …… Arithmetic instructions Logical instructions
Rotate instructions
Comparison instructions
Various 8051 addressing modes
Read textbook pages : P.96 - P.107

3. Arithmetic Instructions
There are 24 arithmetic opcodes which are grouped into the following types:
ADD and ADDC
SUBB
MUL
DIV
INC
DEC DA

4. Arithmetic Flags
Flag: It is a 1-bit register that indicates the status of the result from an operation
Flags are either at a flag-state of value 0 or 1
Arithmetic flags indicate the status of the results from mathematical operations ( +, , *, / )

5. Arithmetic Flags (Conditional Flags)
There are 4 arithmetic flags in the 8051
Carry (C)
Auxiliary Carry (AC)
Overflow (OV)
Parity (P)
All the above flags are stored in the Program Status Word (PSW) CY AC --
RS1
RS0 0V P
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0

6. Arithmetic Flags (Conditional Flags)
CY PSW.7 Carry flag
AC PSW.6 Auxiliary carry flag
PSW.5 Available to the user for general purpose
RS1 PSW.4 Register Bank selector bit 1
RS0 PSW.3 Register Bank selector bit 0
0V PSW.2 Overflow flag
-- PSW.1 User definable flag
P PSW.0 Parity flag
The C flag is keeping track in unsigned operations
The OV flag is keeping track in signed operations

7. Instructions that Affecting Flags (1/2)
Instruction Mnemonic
Flags Affected
ADD C AC OV
ADDC
SUBB
MUL
C = 0
DIV
DA A
SETB C
C = 1
MOV C, bit

8. Instructions that Affecting Flags (2/2)
Instruction Mnemonic
Flags Affected
ORL C, bit C
ANL C, bit
RLC
RRC
CLR C
C = 0
CPL C
C = /C
CJNE

9. The ADD and ADDC Instructions
ADD A, source ; A = A + source
ADDC A, source ; A = A + source + C
A register must be involved in additions
The C flag is set to 1 if there is a carry out of bit 7
The AC flag is set to 1 if there is a carry out of bit 3
ADD is used for ordinary addition
ADDC is used to add a carry after the LSB addition in a multi-byte process

10. Example 6-1
Show how the flag register is affected by the following instructions.
MOV A, #0F5h ; A = F5h
ADD A, #0Bh ; A = F5 + 0B = 00
Solution F5h
+ 0Bh
100h
After the addition, register A (destination) contains 00 and the flags are as follows:
CY = 1 since there is a carry out from D7
P = 0 because the number of 1s is zero
AC = 1 since there is a carry from D3 to D4

11. Example 6-2
Assume that RAM locations 40h – 42h have the following values. Write a program to find the sum of the values in these locations. At the end of the program, register A should contain the low byte and R7 contain the high byte.
RAM locations: 40h = (7Dh), 41h = (EBh), 42h = (C5h)
Solution:
MOV A, 40h ; set A = RAM location 40h
MOV R7, #0 ; set R7 = 0
ADD A, 41h ; add A with RAM location 41h
JNC NEXT ; if CY = 0 don’t accumulate carry
INC R7 ; keep track of carry
NEXT: ADD A, 42h ; add A with RAM location 42h
JNC NEXT1 ; if CY = 0 don’t accumulate carry
NEXT1:
END

12. Example 6-3
Write a program segment to add two 16-bit numbers. The numbers are 3CE7h and 3B8Dh. Place the sum in R7 and R6; R6 should store the lower byte.
CLR C ; make C=0
MOV A, #0E7h ; load the low byte now A=E7h
ADD A, #8Dh ; add the low byte now A=74h and C=1
MOV R6, A ; save the low byte of the sum in R6
MOV A, #3Ch ; load the high byte
ADDC A, #3Bh ; add with the carry
; 3B + 3C + 1 = 78 (all in hex)
MOV R7, A ; save the high byte of the sum

13. The DA Instruction DA A Example 6.4 :
ADDC …..
DA A
ADD …..
DA A
DA A
The action is to “decimal adjust” the register A
Used after the addition of two BCD numbers
Example 6.4 :
MOV A, #47h ; A=47h first BCD operand
MOV B, #25h ; B=25h second BCD operand
ADD A, B ; hex (binary) addition (A=6Ch)
DA A ; adjust for BCD addition (A=72h)

14. Example 6.4 of DA Instruction
Hex BCD 6C
Offset decimal 6 !

15. The SUBB Instruction SUBB A, source No borrow: A = A – source
SUBB A, #data
SUBB A, direct
SUBB , where i =0 or 1
SUBB A, Rn, where n =0,1,,7
SUBB A, source
No borrow: A = A – source
With borrow:
A = A – source – carry (i.e. borrow)
Note that the 8051 uses the 2’s complement method to do subtraction
After execution:
The C flag is set to 1 if a borrow is needed into bit 7
The AC flag is set to 1 if a borrow is needed into bit 3

16. The MUL Instruction MUL AB
Uses registers A and B as both source and destination registers
Numbers in A and B are multiplied, then put the lower-order byte of the product in A and the high-order byte in B
The OV flag is set to 1 if the product > FFh
Note that the C flag is 0 at all times

17. The DIV Instruction DIV AB
Similarly, it uses registers A and B as both source and destination registers
The number in A is divided by B. The quotient is put in A and the remainder (if any) is put in B
The OV flag is set to 1 if B has the number 00h (divide-by-zero error)
Note that the C flag is 0 at all times

18. The INC and DEC Instructions
To increment (INC) or decrement (DEC) the internal memory location specified by the operand
No change with all the arithmetic flags in this operation
e.g. INC 7Fh ; content in 7Fh increased by 1
DEC R1 ; content in R1 decreased by 1
INC A
INC direct
INC @Ri where i=0,or 1
INC Rn where n=0,,7

19. Logic Operation in 8051
Logical operations
Rotate and swap operations
Comparison operations

20. General Logic Functions
There are instructions available for the 8051 to implement the following logic functions
AND OR
XOR (exclusive-OR)
NOT (invert/complement)

21. ANL direct, A
ANL direct, #data
ANL A, #data
ANL A, direct
ANL where i=0,or 1
ANL A, Rn where n=0,,7
Logical Instructions
ANL destination, source
Destination = destination AND source
ORL destination, source
Destination = destination OR source
XRL destination, source
Destination = destination XOR source
Usually, the destination is register A or a direct address in the internal RAM

22. Logical Instructions ANL can be used to clear (0) certain bits
The source operand can be any of the 4 addressing modes (i.e. immediate/register/ direct/indirect)
ANL can be used to clear (0) certain bits
ORL can be used to set (1) certain bits
Examples

23. The CLR and CPL Instructions
All bits in register A are cleared
CPL A
All bits in register A are complemented (inverted)
Note that CLR and CPL instructions operate on register A only

24. The Rotate Instructions
RL A
RR A
Contents in register A is rotated one bit position to the left or to the right (operated in A only)
The bit shifted out is used as the new bit shifted in
May include the C flag in the operation
Useful in inspecting the bits in a byte one by one
Also useful for multiplication and division in powers of 2
RLC A
RRC A

25. The Rotate Instructions
RL A
Rotates A one bit position to the left
RLC A
Rotates A and the carry flag one bit position to the left
RR A
Rotates A one bit position to the right
RRC A
Rotates A and the carry flag one bit position to the right
Note that for RLC and RRC, you have to know the C flag first

26. The Rotate Instructions

27. The SWAP Instruction
Swapping the lower-nibble (lower 4 bits) and the higher-nibble (upper 4 bits) of register A.
SWAP A
Register A = 5Eh (original value) after SWAP Register A = E5h

28. Comparison Operation CJNE destination, source, relative address
Compare the source and destination operands first
Jump to the relative address (subroutine) if they are not equal
Carry flag = 1, if destination-byte is less than the source-byte,
Otherwise, the carry flag is cleared.

29. Comparison Operation CJNE A, #data, relative CJNE A, direct, relative
CJNE @Ri, #data, relative where i=0 or 1
CJNE Rn, #data, relative where i=0,,7
; example !!
CJNE R7, #60H, NOT_EQ
; now R7 = 60H
………………..
NOT_EQ:
JC REG_LOW
; now C = 0, ie. R7 > 60H
REG_LOW:
; now C = 1. ie. R7 < 60H

30. Example 6-5 MOV P1, #0FFh ; make P1 an input port
Write a program segment to monitor P1 continuously for the value of 63h. It should get out of the monitoring only if P1 = 63h.
Solution :
MOV P1, #0FFh ; make P1 an input port
HERE: MOV A, P1 ; get P1
CJNE A, #63h, HERE ; keep monitoring unless ; P1=63h

31. Addressing Modes Addressing mode: a method that…
Points out where the operands (i.e. source and destination) are, and
How these operands should be accessed
The opcode in an instruction specifies what addressing mode will be used

32. Addressing Modes Immediate addressing (eg. MOV A, #55H)
Register addressing (eg. MOV A,R0)
Direct addressing (eg. MOV A,30H)
Register indirect addressing (eg. MOV
Indexed addressing (eg. MOVC
Absolute addressing (eg. ACALL address11)
Long addressing (eg. LCALL addr16 )
Relative addressing (Eg. SJMP relative)

33. Immediate Addressing
Source operand is a constant number/character – “immediate data”
If the operand is a number, we must add a “#” sign before it
e.g. ADD A, #56h ; add 56(16) to the number in register A
e.g. MOV R6, #81 ; load 81(10) into R6
Applications: e.g. initialize a number of registers to zero; overwrite a constant character

34. Examples of Immediate Addressing

35. Notes of Immediate Addressing
Add “#” before any immediate data
Only the source operand can be immediate
Add “h” after a base-16 number, “b” after a base-2 number; otherwise assumed base-10
Use ‘ ’ to enclose any character
Precede all base-16 numbers that begin with A-F by a “0”
MOV A,#ABh

36. Register Addressing
Source/destination/both of them are registers located in the CPU registers (i.e. R0 – R7; A; DPTR)
e.g. MOV A, R5 ; copy the contents of R5 into A
e.g. MOV R3, A ; copy the contents of A into R3
e.g. ADD A, R2 ; add the contents of R2 to contents of A
e.g. MOV R7, DPL
MOV R6, DPH

37. Notes of Register Addressing
The most efficient addressing mode:
No need to do memory access
Instructions are much shorter
Result: speed (hence efficiency) increased
We can move data between Acc and Rn (n = 0 to 7) but movement of data between Rn registers is not allowed
e.g. MOV R4, R (Invalid)

38. Review Questions
Can the programmer of a microcontroller make up new addressing modes?
Show the instruction to load (binary) into R3.
Why is the following invalid? “MOV R2, DPTR”
True or false. DPTR is a 16-bit register that is also accessible in low-byte and high-byte formats.
Is the PC (program counter) also available in low-byte and high-byte formats?

39. Direct Addressing
Source/destination/both of them are specified by an 8-bit address field in the instruction
Use this mode to access the 128 bytes of RAM and the SFR (Table 5-1, textbook P.100)
Location of operand is fixed cannot be changed when program is running, but content can be changed
Inflexible to address elements in a table of data

40. Examples of Direct Addressing
MOV direct,direct
Note: No “#” sign in the instruction

41. Examples of Direct Addressing
MOV R2, #5 ; R2 = 05
MOV A, 2 ; copy location 02 (R2) to A
MOV B, 2 ; copy location 02 (R2) to B
MOV 7, 2 ; copy location 02 to 07 (R2 to R7)
; since “MOV R7, R2” is invalid
MOV direct,direct

42. Stack and Direct Addressing Mode
Only direct addressing mode is allowed for pushing onto the stack
PUSH A (Invalid)
PUSH 0E0h (Valid)
PUSH R3 (Invalid)
PUSH (Valid)
POP R4 (Invalid)
POP (Valid)
PUSH direct
POP direct

43. Example 6-6 Solution : PUSH 05 ; push R5 onto stack
Show the code to push R5, R6, and A onto the stack and then pop them back into R2, R3, and B, where register B = register A, R2 = R6, and R3 = R5.
Solution :
PUSH 05 ; push R5 onto stack
PUSH 06 ; push R6 onto stack
PUSH 0E0h ; push register A onto stack
POP 0F0h ; pop top of stack into register B
; now register B = register A
POP ; pop top of stack into R2
; now R2 = R6
POP ; pop top of stack into R3
; now R3 = R5

44. Notes of Direct Addressing
The address value is limited to one byte, 00 – FFh (128-byte RAM and SFR)
Using MOV to move data from itself to itself can lead to unpredictable results error
MOV data to a port changes the port latch
MOV data from port gets data from port pins
MOV A, A

45. Register Indirect Addressing
Use a register to hold the address of the operand; i.e. using a register as a pointer
Only R0 and R1 can be used when data is inside the CPU (address ranges from 00h – 7Fh) e.g. MOV
R0 ,R1 and DPTR can be used when addressing eXternal memory locations eg. MOVX MOVX
Must put a sign before the register name

46. Register Indirect Addressing (eg. ADD A,@R0)
After
Program
memory
Before
Addresses
ACC R0
ADD
200
201
Data 12 31 32 30 10 22 

47. Examples of Indirect Addressing
where i=0 or 1

48. Example 6-7
Write a program segment to copy the value 55h into RAM memory locations 40h to 44h using:
Direct addressing mode;
Register indirect addressing mode without a loop;
and with a loop

49. Solution to Example 6-7(a)
Direct addressing mode
MOV A, #55h ; load A with value 55h
MOV 40h, A ; copy A to RAM location 40h
MOV 41h, A ; copy A to RAM location 41h
MOV 42h, A ; copy A to RAM location 42h
MOV 43h, A ; copy A to RAM location 43h
MOV 44h, A ; copy A to RAM location 44h

50. Solution to Example 6-7(b)
register indirect addressing mode without a loop
MOV A, #55h ; load A with value 55h
MOV R0, #40h ; load the pointer. R0 = 40h
MOV @R0, A ; copy A to RAM location R0 points to
INC R0 ; increment pointer. Now R0 = 41h
INC R0 ; increment pointer. Now R0 = 42h
INC R0 ; increment pointer. Now R0 = 43h
INC R0 ; increment pointer. Now R0 = 44h

51. Solution to Example 6-7(c)
Loop method
MOV A, #55h ; A = 55h
MOV R0, #40h ; load pointer. R0 = 40h, RAM address
MOV R2, #05 ; load counter, R2 = 5
AGAIN: MOV @R0, A ; copy A to RAM location pointed by R0
INC R0 ; increment pointer R0
DJNZ R2, AGAIN ; loop until counter = zero
MOV R2, #05h ; example
LP: ;
; do 5 times inside the loop
DJNZ R2, LP ; R2 as counter
“DJNZ” : decrement and jump if Not Zero
DJNZ direct, relative
DJNZ Rn, relative where n = 0,1,,,7

52. Example 6-8 (looping)
Write a program segment to clear 15 RAM locations starting at RAM address 60h.
CLR A ; A = 0
MOV R1, #60h ; load pointer. R1 = 60h
MOV R7, #15 ; load counter, R7 = 15 (0F in HEX)
AGAIN: MOV @R1, A ; clear RAM location R1 points to
INC R1 ; increment R1 pointer
DJNZ R7, AGAIN ; loop until counter = zero
; clear one ram location at address 60h
CLR A
MOV R1,#60h
MOV @R1,A
Setup a loop using DJNZ and register R7 as counter

53. Example 6-9 (block transfer)
Write a program segment to copy a block of 10 bytes of data from RAM locations starting at 35h to RAM locations starting at 60h.
; COPY 1 TIMES
MOV R0,#35h
MOV R1,#60h
MOV
MOV @R1,A
MOV R0, #35h ; source pointer
MOV R1, #60h ; destination pointer
MOV R3, #10 ; counter
BACK:
MOV ; get a byte from source
MOV @R1, A ; copy it to destination
INC R0 ; increment source pointer
INC R1 ; increment destination pointer
DJNZ R3, BACK ; keep doing it for all ten bytes

54. Notes of Indirect Addressing
Using pointer in the program enables handling dynamic data structures an advantage
Dynamic data: the data value is not fixed
In this mode, we can defer the calculation of the address of data and the determination of the amount of memory to allocate at (program) runtime
Register or direct addressing (eg. MOV A, 30H) cannot be used ,
since they require operand addresses to be known at assemble-time.

55. MOVC
MOVC
JMP @A+DPTR
Indexed Addressing
Using a base register (starting point) and an offset (how much to parse through) to form the effective address for a JMP or MOV instruction
Used to parse through an array of items or a look-up table
Usually, the DPTR is the base register and the “A” is the offset
A increases/decreases to parse through the list

56. Indexed Addressing 56 After Before 2000 2001 41 00 10 31 
Program
memory
Before
ACC
DPTR
MOVC + DPTR
2000
2001 41 00 10 31 56 
Indexed Addressing
Example: MOVC

57. Examples of Indexed Addressing

59. Example 6-10 (look-up table)
Write a program to get the x value from P1 and send x2 to port P2, continuously.
ORG 0h
MOV DPTR, #300h ; load look-up table address
MOV A, #0FFh ; A = FF
MOV P1, A ; configure P1 as input port
BACK: MOV A, P1 ; get X
MOV ; get X square from table
MOV P2, A ; issue it to port P2
SJMP BACK ; keep doing it
ORG h
TABLE: DB , 1, 4, 9, 16, 25, 36, 49, 64, 81
END

60. Relative Addressing Used in jump (“JMP”) instructions
SJMP relative
DJNZ direct, relative
DJNZ Rn, relative where n=0,1,,,7
Relative Addressing
Used in jump (“JMP”) instructions
Relative address: an 8-bit value (-128 to +127)
You may treat relative address as an offset
Labels indicate the JMP destinations (i.e. where to stop)
Assembler finds out the relative address using the label

61. Relative Addressing The relative address is added to the PC
The sum is the address of the next instruction to be executed
As a result, program skips to the desired line right away instead of going through each line one by one
Labels indicate the JMP destinations (i.e. where to stop).

62. Relative Addressing Program counter + offset = Effective address
Branch Opcode
Offset
Next Opcode
Next Instruction
Program Counter
+ Offset
Program counter + offset
= Effective address
= address of next instruction

63. Examples of Relative Addressing
0035

64. Absolute Addressing Long Addressing
ACALL address11
AJMP address11
Absolute Addressing
Only used with the instructions ACALL and AJMP
Similar to indexed addressing mode
The largest “jump” that can be made is 2K
211 = 2048=2K
Long Addressing
Only used with the instructions LCALL and LJMP
Similar to indexed addressing mode
The largest “jump” that can be made is 64K

65. Absolute vs Long Addressing
Absolute addressing: 11-bit address in 2-byte instruction
Long addressing: 16-bit address in 3-byte instruction
Range of the “jump” of long is greater than absolute
Yet absolute mode has shorter code (2 bytes), hence faster execution

66. Why So Many Modes? There are many methods to do a task
Some are more efficient while some are not
Choosing the right addressing mode will enable us to finish the task efficiently
Let’s take a simple case as example: “Clear the memory location from 30h to 7Fh.”
We can use MOV instruction in direct addressing mode to nullify these memory one by one
But the program will be too lengthy and space-consuming

67. Why So Many Modes?
So, we may try using indirect addressing mode like this:
MOV 30h, #00h ; Clear Array [0]
MOV 31h, #00h ; and Array [1]
; Keep on going .
MOV 7Eh, #00h ; Clear Array [78]
MOV 7Fh, #00h ; Clear Array [79]
MOV R0, #30h ;Set up pointer to start of array
clear_arr: MOV @R0, #00 ;Clear target byte pointed to by R0
INC R ; Advance pointer by 1
CJNE R0, #80H, clear_arr ;Has pointer reached 80 ?
NEXT: ; if not over the top THEN again ELSE
; next instruction
Direct addressing mode uses up 240 bytes
Indirect addressing mode uses up 8 bytes ONLY, with a saving of 232 bytes !
5x16x3 = 240
Since 3 bytes for MOV direct, #data

68. A Little Further ….. Yet, the program is still too long.
A much better method would be writing a subroutine (= function in C programming) to do nullification
Write a loop to call the subroutine for (7F-30+1) times to nullify all memory
As a result, we don’t have to write so many lines of program

69.  Read reference
The 8051 Microcontroller and Embedded Systems - Using Assembly and C, Mazidi
Chapter 5 P.109 – P.135
Chapter 6 P.139 – P.167

70. │ THE END │