1. The Microprocessor & Its Architecture
AH AX AL
8-bit
16-bit
BH BX BL
CH CX CL
DH DX DL SP BP DI SI
32-bit
EAX
EBX
ECX
EDX
ESP
EBP
EDI
ESI IP
FLAGS
EIP
EFLAGS CS DS ES SS FS GS
Accumulator
Base index
Count
Data
Stack pointer
Base pointer
Source index
Flags
Code
Extra
Stack
1. The Programming Model :-
Programming model of the 8086 – P4 is considered to be program visible.
The and above contain the program invisible registers.
Destination index
Instruction pointer
Fig. 2-1 The Programming Model of the Intel 8086 through the Pentium.

2. Multipurpose Registers
EAX (Accumulator).
Used for instructions such as multiplication, division, and some of the adjustment instructions (special purpose).
In the and above, the EAX register may also hold the offset address of a location in the memory system.
2. EBX (base index).
BX sometimes holds the offset address of a location in the memory system in all versions of the µp.
In the and above, EBX also can address memory data.

3. ECX (count). Holds the count for various instructions.
In the and above, EXC also can hold the offset address of memory data.
Instructions that can use a count are the repeated string instructions ( REP/REPE/REPNE); and shift, rotate, and LOOP/LOOPD instructions.
Shift and rotate use CL.
Repeated string instructions use CX.
LOOP/LOOPD use either CX or ECX.
EDX (data).
Holds a part of the result from a multiplication or part of the dividend before division.
In the and above, this register can address memory data.

4. 6. EDI ( destination index).
EBP (base pointer).
Points to a memory location in all versions of the µp for memory data transfers.
Addressed as either BP or EBP.
EDI ( destination index).
Addresses string destination data for the string instructions.
It also functions as either DI or EDI (G-P R).
ESI (source index).
Addresses source string data for the string instructions.
Used as either SI or ESI (G-P R).

5. Special Purpose Registers
EIP (instruction pointer).
Addresses the next instruction in a section of memory defined as a code segment.
IP (16 bits) when µp operates in the real mode.
EIP (32 bits) when the and above operate in the protected mode.
EIP, or IP can be modified with a jump or a call instruction.
ESP (stack pointer).
Addresses an area of memory called the stack.
SP (16 bits), and EPS (32 bits).

6. EFLAGS. Indicate the condition of the µp and control its operation.
contain a FLAG register (16 bits).
The and above contain an EFLAG register (32 bits). ID
VIP
VIF AC VM RF NT
IOP 1 O D I T S Z A P C 31 21 20 19 18 17 16 14 13 12 11 10 9 8 7 6 4 2
8086/8088/80186/80188
80286
80386/80386DX
80486SX
Pentium/Pentium 4
Fig The EFLAG and FLAG.

7. C (carry) : holds the carry after addition or the borrow after subtraction.
C= carry, or borrow.
C= no( carry, or borrow).
P (parity) : is the count of ones in a number expressed as even or odd.
P= odd parity.
P= even parity.
A (auxiliary carry) : holds the carry (half-carry) after addition or the borrow
after subtraction between bit 3 and 4 of the result.
A= half – carry.
A= no half – carry.
Z (zero) : shows that the result of an arithmetic or logic operation is zero
Z= result is zero.
Z= result isn’t zero.

8. S (sign) : holds the arithmetic sign of the result after an arithmetic or
logic instruction executes.
S= negative.
S= positive.
T (trap) : enables trapping through an on chip debugging feature.
T= enables.
T= disable.
I (interrupt) : controls the operation of the INTR (interrupt request)
input pin.
I= pin is enabled.
I= pin is disabled.
D (direction) : selects either the increment or decrement mode for
the DI and/or SI registers during string instructions.
D= decrement.
D= increment.
O (overflow) : indicates that the result has exceeded the capacity of
the machine.
O= overflow.
O= no overflow.

9. Segment Registers 1. CS (code). 2. DS (data).
Holds the code used by the µp.
It defines the starting address of the section of memory holding code.
64K bytes in the
4G bytes in the and above.
2. DS (data).
Contains most data used by a program
Data accessed by an offset address.

10. 3. ES (extra). Additional data segment. Hold destination data.
4. SS (stack).
Defines the area of memory used for the stack.
5. FS and GS.
Supplemental segment registers.
In the and above.
Allow two additional memory segments for access by programs.

11. REAL MODE MEMORY ADDRESSING
operate in real mode.
80286-P4 operate in either real or protected mode.
Real mode allows µp. to address only 1st 1M bytes of memory.
1st 1M bytes called the real memory, conventional memory, or DOS memory.
In all cases each of these µp. begins operation in the real mode by default whenever power is applied or the µp. is reset.

12. SEGMENTS AND OFFSET
All real mode memory addresses must consist of a segment address plus an offset address.
Segment address, located within one of the segment registers, defines the beginning of address of any 64K-byte memory segment.
Offset address selects any location within the 64K-byte memory segment.
Offset address, sometimes called a displacement.
Segments in the real mode always have a length of 64K bytes.
Offset or displacement is the distance above the start of the segment.

13. 64K–byte segment 1000 Real mode memory
Fig The real mode memory- addressing scheme.
Real mode memory
FFFFF
1FFFF
Offset = F000
1F000
64K–byte
segment
Segment register
1000
10000
00000

14. Real mode segments can begin only at a 16- byte boundary (paragraph) in the memory system.
(1000H H)= (10000H H) = 12000H
1000:2000
In the (with special external circuitry) and through the Pentium 4, an extra 64K minus 16 bytes of memory is addressable when segment address is FFFFH and the HIMEM.SYS driver for DOS is installed in the system.
(0FFFF0H-10FFEFH) high memory

15. Default Segment & Offset Registers
µp. has a set of rules that apply to segments whenever memory is addressed.
Segment
Special Purpose
Offset CS
Instruction address IP SS
Stack address
SP or BP DS
Data address
BX,DI,SI, an 8- or 16-bit
number ES
String destination address
DI for string instructions
Default 16-bit segment and offset combinations

16. String destination address EDI for string instructions
Segment
Special Purpose
Offset CS
Instruction address
EIP SS
Stack address
ESP or EBP DS
Data address
EAX,EBX,ECX,EDX,EDI,
ESI, an 8- or 16-bit
number ES
String destination address
EDI for string instructions FS
General address
No default GS
Default 32-bit segment and offset combinations

17. Data
Code
Stack
Extra
1000
2000
3400
4900
00000
0FFFF
10000
1FFFF
20000
2FFFF
30000
33FFF
34000
43FFF
44000
48FFF
49000
58FFF
59000 ES SS CS DS
FFFFF
Memory
Fig A memory system showing the placement of four memory segments.

18. Segment and Offset Addressing Scheme Allows Relocation
A Relocatable program is one that can be placed into any area of memory and executed without change.
Relocatable data are data that can be placed in any area of memory and used without any change to the program.

19. Memory
FFFFF S T A C k D O E
Fig An application program containing a code, data, and stack segment loaded into a DOS system memory.
0A480
0A47F
Stack
0A280
0A28 SS
0A27F
Data
0A0F0
0A0F DS
0A0EF
Code
090F0
090F CS
0908F
DOS and drivers
00000