1. Crosstalk Noise in FPGAs
Yajun Ran
Malgorzata Marek-Sadowska
Department of Electrical and Computer Engineering
University of California, Santa Barbara, CA

2. Outline Crosstalk noise trends in FPGAs
Conventional crosstalk-avoidance schemes
Twist switch box
Experimental results
Conclusions

3. Crosstalk noise Capacitive coupling Functional failure Delay noise A A

4. FPGA structure
CLB S Fc Fs
Segmentation
CLB size

5. Interconnects in FPGAs
Huge capacitance
Buffered wires
Larger logic delay
CLB
LUT FF

6. Crosstalk: still a problem
Expermental settings
Segment length per stage
Minimum space
Minimum width
Berkeley PTM model

7. Crosstalk – reduction methods
Coupling capacitance
wire spacing
Neighboring switching
shielding
Weak victim/strong aggressor
buffer sizing

8. Noise cancellation Crosstalk can cause slowdown and speedup
CLB
A. B. Kahng etal. “Interconnect Tuning Stategies for High-Performance ICs”, DATE’99

9. Experiments

10. Noise distribution Crosstalk requires
timing correlation
logic correlation
Worst-case accumulation along a path is unlikely
input skew
 delay Tr

11. Noise distribution

12. Noise distribution Y =  1 Xi : f(x) = e  y e f(y) =  (n) -x/ -y/
input skew
noise Tr
f(x) = e
-x/  1
Xi : n
Y =  Xi 1
f(y) =
-y/
 (n)
y e n
n-1
pdf
normal distribution
noise

13. Noise distribution normal distribution approximation 32n n 2n
same mean n = 2n
different deviation n = 22n

14. Previous switch boxes subset universal Wilton5 5 4 4 3 3 2 2 1 1
subset universal Wilton
Common: neighbor wires are still neighbors if they follow the same direction. BAD for crosstalk noise!

15. Twist switch box Neighbor relations are broken1 2 3 4 5
Neighbor relations are broken
Worst-case accumulation more difficult 5 5 4 4 3 3 2 2 1 1 1 2 3 4 5

16. Twist switch box - construction
Always exists if N > 3
Can be derived from previous switch box 1 2 3 4 5 5 5 4 4 3 3 2 2 1 1 1 2 3 4 5

17. Twist switch box - constructionE W
f(t)
Wilton
Twist
W-E t
S*t
S-N t
S*t
W-N
N-t+2
S*(N-t)+2
N-E
t+1
S*t+1
S: Separation factor
S > 1
S < N-1
W-S
t-1
S*t-1
S-E
N-t
S*(N-t)

18. Experiments – settings
VPR - place and route
20 largest MCNC benchmarks
2 segmentation schemes
.13um technology
aggressor counts
CLB
CLB
CLB
CLB

19. Experiments – coupling length
longest one: coupling 34 blocks!

20. Experiments – delay noise
8% improvement %

21. Conclusions and future work
Crosstalk noise will be a serious problem even in FPGAs
Trade-off among different crosstalk avoidance strategies
Twist switch box naturally suppresses crosstalk noise
More accurate noise analysis methods