1. Router Construction Outline Switched Fabrics IP Routers
Extensible (Active) Routers
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2. Workstation-Based Aggregate bandwidth 1/2 of the I/O bus bandwidth
capacity shared among all hosts connected to switch
example: 800Mbps bus can support 8 T3 ports
Packets-per-second
must be able to switch small packets
100,000 packets-per-second is achievable
e.g., 64-byte packets implies 51.2Mbps
CPU
Main memory
I/O bus
Interface 1
Interface 2
Interface 3
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3. Switching Hardware Design Goals Ports Fabric
throughput (depends on traffic model)
scalability (a function of n)
Ports
circuit management (e.g., map VCIs, route datagrams)
buffering (input and/or output)
Fabric
as simple as possible
sometimes do buffering (internal)
Input
port
Output
Fabric
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4. Wherever contention is possible
Buffering
Wherever contention is possible
input port (contend for fabric)
internal (contend for output port)
output port (contend for link)
Head-of-Line Blocking
input buffering
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5. Crossbar Switches
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6. Knockout Switch Example crossbar Concentrator Complexity: n2
select l of n packets
Complexity: n2 D 1 2 3 4
Outputs
Inputs
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7. Knockout Switch (cont)
Output Buffer
(c)
Shifter
Buffers
(b)
(a)
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8. Self-Routing Fabrics Banyan Network
constructed from simple 2 x 2 switching elements
self-routing header attached to each packet
elements arranged to route based on this header
no collisions if input packets sorted into ascending order
complexity: n log2 n
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9. Self-Routing Fabrics (cont)
Batcher Network
switching elements sort two numbers
some elements sort into ascending (clear)
some elements sort into descending (shaded)
elements arranged to implement merge sort
complexity: n log22 n
Common Design: Batcher-Banyan Switch
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10. Line Cards + Forwarding Engines
High-Speed IP Router
Switch (possibly ATM)
Line Cards + Forwarding Engines
link interface
router lookup (input)
common IP path (input)
packet queue (output)
Network Processor
routing protocol(s)
exceptional cases
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11. High-Speed Router Routing CPU Buffer memory Routing software
Line card
(forwarding
buffering)
Routing
CPU
Buffer
memory
Routing software
w/ router OS
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12. Alternative Design . Crossbar Switch PC 3-Jan-19
CPU
MEM
NI with uP .
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13. Recap First mile problem Internet End Users www.cnn.com Last mile
Sprint
Charter
End Users
UUNET
MCI
Last mile
problem
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14. Recap Direct link networks Packet switching 3-Jan-19
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15. Internetworking
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16. Internetworking Outline Best Effort Service Model
Global Addressing Scheme
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17. Concatenation of Networks
IP Internet
Concatenation of Networks
Protocol Stack R2 R1 H4 H5 H3 H2 H1
Network 2 (Ethernet)
Network 1 (Ethernet) H6
Network 3 (FDDI)
Network 4
(point-to-point) H7 R3 H8 H1 H8
TCP
TCP R1 R2 R3 IP IP IP IP IP
ETH
ETH
FDDI
FDDI
PPP
PPP
ETH
ETH
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18. Connectionless (datagram-based)
1. Service Model
Connectionless (datagram-based)
Best-effort delivery (unreliable service)
packets are lost
packets are delivered out of order
duplicate copies of a packet are delivered
packets can be delayed for a long time
Datagram format V
ersion
HLen
TOS
Length
Ident
Flags
Offset
TTL
Protocol
Checksum
SourceAddr
DestinationAddr
Options (variable)
Pad
(variable) 4 8 16 19 31
Data
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