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Common mode feedback for fully differential amplifiers

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Presentation on theme: "Common mode feedback for fully differential amplifiers"— Presentation transcript:

1 Common mode feedback for fully differential amplifiers

2 Differential amplifiers
Cancellation of common mode signals including clock feed-through Cancellation of even-order harmonics Double differential signal swing, SNR↑3dB Symbol:

3 Two-Stage, Miller, Differential-In, Differential-Out Op Amp
peak-to-peak output voltage  2·OCMR Output common mode range (OCMR) = VDD-VSS - VSDPsat - VDSNsat

4 Common Mode Output Voltage Stabilization
Common mode drift at output causes differential signals move into triode region

5 Common Mode feedback All fully differential amplifier needs CMFB
Common mode output, if uncontrolled, moves to either high or low end, causing triode operation Ways of common mode stabilization: external CMFB internal CMFB

6 Common mode equivalent
VBP Vo1cm I2 Vicm Vocm VBN I1

7 What about single ended? Does it have the same problem?
VBP I2 I1 Vo1cm Vicm Vo Vicm VBN What about single ended? Does it have the same problem? Does it require feedback stabilization?

8 Yes, to all three questions
VBP I4 I3 Yes, to all three questions Vo1cm I6 Vi- Vo I1 I2 Vi+ I7 VBN To match I1 and I3, the diode connection provides the single stage negative feedback to automatically generate Vg3. The match between I2 and I4, and I6 and I7 is a two stage problem and requires negative feedback: needs feedback from Vo to Vi-.

9 All op amps must be used in feedback configuration!
VBP I4 I3 All op amps must be used in feedback configuration! Vo1cm I6 Vi- Vo I1 I2 Vi+ I7 VBN VBP I4 I3 Vo1cm Buffer connection or resistive feedback provides the needed negative feedback I6 Vi- Vo I1 I2 Vi+ I7 VBN

10 Fully differential amplifiers are also used in feedback configuration.
Vi+ Vo- Vp Vn Vi- Vo+ Hence, differential signal is well defined.

11 But when you add the first two equations
Vi+ Vo- Vp You get: Vn Vi- Vo+ Since Vp+Vn is undefined, Vo++Vo- is undefined.

12 4 equations: Vi = given value Vp = given value feedback relation
4 variables: Vi, Vo, Vn, Vp 4 equations: Vi = given value Vp = given value feedback relation Vn~=Vp from A large All 4 variables and internals fixed Vi Vn Vo Vp 6 variables: Vi+, Vi- Vo+, Vo-, Vn, Vp 5 equations: Vi+ = given value Vi- = given value feedback relation from Vo- feedback relation from Vo+ Vn~=Vp from A large Not sufficient to fix all variables Vi+ Vo- Vp Vn Vi- Vo+

13 Basic concept of CMFB: Dvb e
Since diff feedback and diff input uses Vin+ and Vin-, CMFB has to be applied to somewhere else: like a bias current CM measurement Vo+ +Vo- 2 Vo+ Vo- Voc - CMFB Dvb e VocRef + desired common mode voltage

14 Basic concept of CMFB: Dvb e e
measurement Vo+ +Vo- 2 Vo+ Vo- Voc - CMFB Dvb e e VoCRef + Find transfer function from e to Voc: ACMF(s) Find transfer function from an error source to Voc: Aerr(s) Voc error due to error source: err*Aerr(0)/ACMF(0)

15 example HW: When Vb2 changes by D, how much does Voc change?
When Vic changes by D, how much does Voc change? What circuit design tricks can be used to reduce Voc change? Vb2 M3 M4 M6 M8 CC CC Vi+ M1 Vi- Vo+ Vo- M2 VCMFB M5 Vb1 M9 M7 Vo+ VCMFB Voc ACMFB 1/2 - Vo- +

16 Need to make sure to have negative feedback
Example Voc ? ? VocRef Need to make sure to have negative feedback

17 Resistive C.M. detectors:
Vo+ Vo-

18 Resistive C.M. detectors:
Vo.c. R1 R1 Vo+ Vo- Vi+ Vi- Not recommended. The resistive loading kills gain.

19 Buffer Vo+, Vo- before connecting to R1.
Voc Vo+ Vo- R1 R1 Simple implementation: source follower Vo.c. Vo+ Vo- * Gate capacitance is added to your amp load.

20 Why not: Voc Vo+ Vo- Voc node is floating!! Solution: add leakage to drain Voc node. Voc Vo+ Vo-

21 OUT+ M2A M2B BIAS3 IN- M3A M3B IN+ M1A M1B M10 M5 CL=4pF 4pF M9A M4A M9B M4B VDD VSS OUT- BIAS2 BIAS1 BIAS4

22 BIAS4 1.5pF M13A M13B 20K OUT+ OUT- BIAS2 BIAS1 M7A M7B M6C M6AB M11 M8 M12A VSS VDD Vref M12B

23 Practical: Combine resistor, capacitor, and buffering
VDD M7A 150/3 150/3 M2A M2B 300/3 300/3 75/3 M13A M13B BIAS4 averager 1.5pF 1.5pF M7B 75/3 M3B BIAS3 OUT+ OUT- 20K 20K M3A 300/2.25 300/2.25 300/2.25 300/2.25 M6C 75/2.25 IN- IN+ Source follower M1A M1B M12B M6AB M12A 1000/2.25 75/2.25 1000/2.25 200/2.25 BIAS2 M11 M10 M9A M9B CL=4pF 4pF 150/2.25 50/2.25 50/2.25 BIAS1 M8 M5 200/2.25 M4A M4B 150/2.25 50/2.25 50/2.25 VSS Folded cascode amplifier

24 To increase or decrease the C.M. loop gain:
e.g. Voc VocRef VCMFB

25 Another implementation
Use triode transistors to provide isolation & z(s) simultaneously. M1, M2 in deep triode. VGS1, VGS2>>VT In that case, circuit above M1, M2 needs to ensure that M1, M2 are in triode. Vx Vo+ Vo- I1 = b((Vo+ – VT)Vx – 0.5Vx^2) I2 = b((Vo- – VT)Vx – 0.5Vx^2) I = 2b((Vo+ + Vo-)/2 – VT)Vx – 0.5Vx^2) =2b((Voc – VT)Vx – 0.5Vx^2) Vx = Voc–VT – ((Voc–VT)^2-I/b)^0.5 dVx/dVoc =– Vx/(Voc – VT – Vx)  – Vx/(Voc – VT) M1 M2 can be a c.s. When Vx small: I  {2b(Voc – VT)}*Vx  M1&M2 together act as a Voc controlled resistor.

26 Example: Input stage Vo+ Vo- Vb M1 M2 e.g. Vo+, Vo-≈2V at Q & Vb ≈1V , Then M1&2 will be in deep triode.

27 Vo- Vo+ Vb1 Vb2 VX M1 M2

28 Two-Stage, Miller, Differential-In, Differential-Out Op Amp
M10 and M11 are in deep triode

29 Vo++ Vo- 2 VocREF. VCMFB Vo+ Note the difference from the book accommodates much larger Voc range Vo-

30 Small signal analysis of CMFB
Example: IB IB VocREF M4 M3 Vout+ Vout- M1 M2 -Δi +Δi +Δi M5 +Δi -Δi -Δi VCMFB Δi=0 2Δi VCMFB Differential signal Common mode signal

31 M1 M3 VocREF M4 M2 M5 M6

32 Differential Vo: Vo+↓ by ΔVo, Vo-↑ by ΔVo
Common mode Vo: Vo+↑ by ΔVo, Vo-↑ by ΔVo

33

34 Switched cap CMFB supports full Vo swing: VSS to VDD
Φ1 Φ2 Φ1 VoCRef VCMFB Vb-repl Vo- VoCRef During phi_1, the left cap are charged by the op amp output, and the right caps are charged by the reference and nominal bias voltage. During phi_2, the charges are averaged.

35 One simplified implementation
VCM: desired Voc VGS14: desired bias Split for gain reduction C1=C2

36 Points to consider If supply is high: If supply is very low:
S2 can be NMOS S1 and S3 can be either NMOS or PMOS or transmission gates S4 an S5 must be transmission gates If supply is very low: May need to use charge pump to boost the switch gate voltages Error due to charge injection from switches Intentionally offset VCM and VGS14 Use simulation to determine the right values

37 Bandwidth of CMFB loop Ideally, if CM and DM are fully decoupled, CM only needs to stabilize operating points.  CM bandwidth only needs to be wide enough to handle disturbances affecting operating points. Practically, there is CMDM conversion. CM loop needs to handle disturbances of bandwidth comparable to DM BW But CM loop shares most of DM poles and have additional poles,  difficult to achieve similar bandwidth,  make CM loop bandwidth a few times lower than DM Here Bandwidth = unity loop gain frequency

38 Example VBP I2 I1 Vo1 Vo Vi++Vicm Vi-+Vicm VBN VCMFB VBN

39 CM and DM equivalent circuit Comparison
VBP VBP CM DM Vo1cm ½Vo1d I2 I2 Vid -½Vid Vocm ½Vod AC GND ½ M5 I1 VCMFB I1 VBN VBN ro1=rdsp||rdsn≈ ½rdsp ro1=rdsp||rcascode≈rdsp gm = gm1 gm = ½gm5 Low frequency pole p1 is about 2X lower in CM; DC gain is change by 2*½gm5/gm1, unity gain frequency gm/CC is changed by ½gm5/gm1, high frequency poles and zeros of DM remain in CM, CM has one additional node at D5 similar or worse PM at unity gain fre

40 Vi Vo1 VBP VBN Vo I2 I1 M1 M2 CC CL Vi Vo1 VBP VBN Vo I2 I1 M1 M2 CC CL

41 To ensure sufficient CMFB loop stability
CMFB loop gain = CM gain from VCMFB to Voc * gain of CMFB circuit To ensure sufficient PM for CMFB loop Make the DC gain of CMFB circuit to be a few time less than one That makes the CMFB loop UGF to be a few times lower than DM gain’s UGF Make sure the additional pole in the CM gain and any additional poles from the CMFB circuit to be at higher frequency than DM UGF

42 CM gain’s additional pole at D5 is given by: ~ -gm1/(Cgs1+½Cdb5)
This is close to fT of M1. So at very high fre. If the CMFB circuit below is to be used, then the following needs to be true: IB and M5 sized to give desired VCMFB when Vo+=Vo-=desired CMFB circuit DC gain ACMFB=2gm1f/gm5f is small. Pole of CMFB – gm5f/(Cgs5+Cgs5f+Cdb5f+Cdb1,2f) >> ACMFB*(UGF of DM) VBP VBP IB VCMRef IB Also, W/L of M1-4f should be small, so that their VEB is large to accommodate Vo+, Vo- swing. This is consistent with (1.) above Vo+ Vo- M1f M3f M4f M2f VCMFB M5f

43 Also, W/L of M1-4f should be small, so that their VEB is large to accommodate Vo+, Vo- swing.
At Q-pt, Vo+, Vo- and VCMRef are all equal, and VS1f = VCMRef + VTP + VEB When Vo+ is at Vomax, M1f turns off and all current goes to M3f, M3f has 20.5VEB, M1f has 0 VEB. Hence, VS1f = VCMRef + VTP VEB, and VS1f = Vomax = VCMRef VEB. Similarly, VS2f = Vomin = VCMRef – 20.5VEB. Hence, Voswing = 2*20.5*VEB  VEB >= Voswing /2*20.5 But, IB need to be in saturation, hence VS1fmax = VCMRef + VTP + VEB <= VBP+VTP  VCMRef <= VBP – Voswing /2*20.5

44 AvCM(w) AvDM(w) AvCMFBLoop(w) Av(w) of CMFB circuit
But does not mean CM Q point can be maintained with -70dB accuracy! Example DC gains AvCM(w) 85dB 80dB 70dB AvDM(w) AvCMFBLoop(w) w -15dB Av(w) of CMFB circuit

45 Why?

46 Because op amp is always used in feedback configuration.
DM feedback also kills CM gain, since DM and CM share the same path from vo1 to vo. VBP I1 Vo1- I2 Vi+ Vo+ VBN VCMFB VBN Ri Rf Rf Ri Vin+

47 CM ½ M5 VBP Vo1cm I2 Vicm = -bVocm Vicm Vocm gm=gm1/(1+2gm1ro5) I1
-1 gm=gm1/(1+2gm1ro5) ½ M5 I1 VCMFB VBN

48 AvCM(w) New AvCM(w) AvDM(w) AvCMFBLoop(w) New AvCMFBLoop(w)
Example DC gains AvCM(w) 85dB 80dB New AvCM(w) 70dB AvDM(w) gm5ro5/b 40dB 25dB AvCMFBLoop(w) w New AvCMFBLoop(w) -15dB Av(w) of CMFB circuit

49 Is it good enough to stabilize the CM Q points to -25 dB accuracy level?
If not, what can be done? Increase the effective gm5ro5! That is: use cascode tail current source. This will improve the CMFB loop gain under DM feedback by about 30 to 35 dB. Or, increase the gain of CMFB circuit. In doing so, avoid introducing high impedance node, avoid introducing poles near or lower than DM GB.

50 Voc variation range Voc variation comes from two sources
Input common mode Common mode PVT variations Vicm induced Voc variation Find closed-loop Vicm range Find closed-loop gain from Vicm to Voc Find contribution to Voc variation PVT induced Voc variation Refer all PVT variations to VBP variation Find gain closed-loop from VBP to Voc

51 CM ½ M5 CMFB circuit VBP Vo1cm I2 Vicm Vocm V’icm gm=gm1/(1+2gm1ro5)
-1 V’icm gm=gm1/(1+2gm1ro5) ½ M5 I1 VCMFB VBN CMFB circuit Vocm-Des


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