1. Chapter – 2
Logic Families

2. Classification of Logic Families

3. Bipolar logic families

4. Bipolar logic families

5. Unipolar logic families

6. Characteristics of Digital ICs
Fan out
Fan in
Propagation delay
Power dissipation
Noise margin / noise immunity
Figure of merit
Current and voltage
Power supply requiems
Operating temperature range
Flexibility available.

7. Characteristics of Digital ICs

8. Characteristics of Digital ICs
Fan out- is defined as the maximum no. of logic gates which can be driven by a gate
Higher the fan out higher the current supplying capacity of a gate.
Fan in – the no of inputs gate.
for example a two i/p gate will have fan in equal to 2.

9. Propagation delay
The delay time are measured between 50% voltage level of i/p & o/p waveform.
There are two delay time- tPHL & tPLH
tPHL – when o/p goes from high state to low state.
tPLH- when o/p goes from low state to high state.

11. Power dissipation

12. Power dissipation

13. Noise margin / noise immunity
Noise margin -Noise is an unwanted electrical disturbance which may induce some voltage in the connecting wires used between two gates.
Noise immunity -The circuit ability to tolerate noise signal is referred as the noise immunity.

14. Figure of merit

15. Current and voltage para.
VIH = High level input voltage.
VIL = Low level input voltage.
VOL= Low level output voltage.
VOH= High level output voltage.
IIL = Low level input current.
IIH = High level input current.

16. Power supply requiems-
The amount of power required by IC is important to choose proper power supply.
Operating temperature range-
Industrial application is 0oC to 70oC
Military application is -55oC to 125oC

17. Important logic families are
TTL-
It is a transistor transistor logic.
This is most popular logic family as lot of functions are available in the family
The important series are 74xx & 54xx
It works with power supply of +5v.

18. The multiple emitter transistor

19. Two input TTL-NAND Gate

20. Two input TTL-NAND Gate

23. Totem-pole arrangement
The arrangement of Q3 & Q4 on the o/p side of a TTL NAND gate is called as the totem -pole arrangement

24. Advantages
Low propagation delay
High power dissipation
High current sourcing and sinking capabilties.

25. TTL Characteristics

26. Positive logic- logic 0 = 0v
Negative logic - logic 0 = +5v
logic1 = 0v

27. Open collector 2 i/p NAND gate

28. Open collector 2 i/p NAND gate

29. Open collector 2 i/p NAND gate

30. Comparison

31. Emitter coupled logic

32. Emitter coupled logic

33. Emitter coupled logic

34. Emitter coupled logic

35. Emitter coupled logic- NOT gate

36. Emitter coupled logic

37. ECL Characteristics

38. Emitter coupled logic

39. MOS LOGIC FAMILIES

40. MOS LOGIC FAMILIES

41. N-MOS CIRCUIT

42. N-MOS INVERTER

43. N-MOS INVERTER

44. N-MOS INVERTER

45. N-MOS NAND GATE

46. N-MOS NAND GATE

47. N-MOS NOR GATE

48. N-MOS NOR GATE

49. P-MOS INVERTER GATE

50. P-MOS INVERTER GATE

51. C-MOS

52. C-MOS INVERTER

53. C-MOS INVERTER

54. C-MOS INVERTER

55. C-MOS NOR GATE

56. C-MOS NOR GATE

57. C-MOS NOR GATE

58. C-MOS NAND GATE

59. C-MOS NAND GATE

60. C-MOS NAND GATE

61. C-MOS Advantage Low pawer dissipation High fan out typically 50
High noise margin for higher than values of VDD.
Capable of working over a wide range of supply voltage.
Switching speed comparable to those of TTL.
High packaging density since MOS device need less space.
Disadvantage-
Propagation delay longer than those of TTL (25 TO 100ns)
Slower than TTL.
Need protection circuitry.

62. C-MOS

63. Comparison

64. Comparison