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Monster Chip like Monster Home?
1/15/2019 Monster Chip like Monster Home? “…what San Franciscans have come to know as a monster home--a 6,000- square-foot behemoth that would tower five stories high, casting neighbors in its shadow and stretching clear to its lot lines.” “San Franciscans Fight Monster Home Invasion,” LA Times, 7/13/00 Bay Area cities using ordinances to stop them Era of wretched excess: home,PC Memory for branch prediction bigger than minicomputer memory! Word processors that need 16 MB! Patterson monster 2/5/01 CS61C F99
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Desktop vs. Gadgets/Server
1/15/2019 Desktop vs. Gadgets/Server Desktop has warped design space: max die size, max SPEC, power be damned Gadgets: Cost/Power/Performance MIPS per joule, MIPS per dollar 2001: 500 – 550 million cell phone handsets, each with 32-bit MPU + DSP vs. 120 million PCs Servers: Power/Throughput Tasks per second v. SPECmark Future: low power so combined with disks Patterson monster 2/5/01 CS61C F99
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Sustaining Moore’s Law vs. MIPS/$?
1/15/2019 Sustaining Moore’s Law vs. MIPS/$? Intel MPU die ~1000X RISC II die Scaled 32-bit, 5-stage RISC II 1/1000th of current MPU, die size or transistors Patterson monster 2/5/01 CS61C F99
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New view: ClusterOnaChip (CoC)
1/15/2019 New view: ClusterOnaChip (CoC) Inspiration: Google Search engine for world: 100M/day Economical, scalable build block:PC cluster today 6000 PCs, disks Advantages in fault tolerance, scalability, cost/performance 32-bit MPU as the new Nand Gate “Cluster on a chip” with 100s of MPUs enable amazing MIPS/$, MIPS/watt for cluster applications MPUs combined with dense memory + system on a chip CAD + quick turn fab 30 years ago Intel 4004 used 800 gates: when 800 MPU chip? Patterson monster 2/5/01 CS61C F99
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