1. Next Linear Collider Test Accelerator and EPICS
PSI Epics Meeting
May, 2001
S. Allison, R. Chestnut, M. Clausen, K. Luchini

2. Current NLCTA Controls
Originally an EPICS target
Mixture of SLC, Labview, Veetest Slow (1/2 Hertz control)
Two structures with two klystrons each
“Process” structures to show feasibility/durability for NLC
Desire to run without operators present

3. What’s the big deal? Structures are critical for NLC design
Results are pivotal for the NLC cotillion at Snowmass
Current intense involvement by a diagnostics group SWAT team
Current intense scrutiny by management

4. NLCTA RF Processing Layout
Drive 1
Sled
Klys
Out
RE1
FE1
Drive 2
RE2
FE2
Load1
Load2
These measurement points correspond to the variables mentioned in the briefing. These are in Joules, and are the integral over the RF pulse.

5. The move to EPICS Slow IOC (MV177) Fast IOC (MVME 2700) Alan Bradley
VSAM
Fast IOC (MVME 2700)
ADC signals
TDC signals
DAC control
Digital I/O

6. Slow IOC Alan Bradley interface to move from Veetest to Epics
Prying details from PLC programmers
Lots of signals – the devil is in the details
Work well under way, with many details remaining

7. Fast IOC 60 (or 120 Hz) operation
New (for us) integrating ADC, TDC, DAC and digital I/O support
New (for us) Power PC
Requirements specify pulse by pulse monitor and control of structure processing

8. Fast IOC Hardware MVME 2700 Power PC Caen V265 Gated ADC (3)
Lecroy 1176 TDC
VMIC bit Digital I/O
VMIC bit D/A
Joerger VTR bit digitizer (later)

9. Fast IOC fast loop Read in 20 ADC signals and 6 TDC signals
Perform limit checks on various power measurements
Disable on one felony OR two parole violations in quick succession
Provide ring buffers for off-line analysis
All of the above synchronized on each pulse

10. Fast ADC and “PIOP” records
One ADC interrupts; other records fired by events; whole fast loop is one lockset.
One “ADC” record for each module
Quadratic conversion per channel
Circular buffers built in

11. Fast ADC Record 120 Hz 8 HW Inputs Per Channel: FE1 Signal in Joules
N-sec circ. buffer
FE1
Load1 ……
8x3 conversion coefficients

12. Fast ADC and “PIOP” records
One “PIOP” record per structure – not 1-to-1 with ADC records.
“PIOP” record has 20 or so db links to hard-coded PVs.
One ADC and one PIOP at 60 Hz take 6% of the MV177
Seems to take about seconds per loop.

13. “PIOP” subroutine record
120 Hz
Functioning:
Calculate NORM, LOST
Check for warning/error
Drive GO/NOGO digital output
Inputs:
9( or maybe12) converted
ADC signals + limits

14. Fast IOC asynchronous fast code
Implement re-enabling strategies for different failure modes
Watch vacuums and other relevant data
Can also trip off on vacuum
All of the above fast, but asynchronous to the pulse-by-pulse flow

15. Next Milestones
May 7 – have local testing done; ready to move equipment down to NLCTA.
May 15 – next run starts; be ready to run parasitically
June 29 – Current structures at end of life; Snowmass; cut over to Epics as primary system.

16. The other 20% Displays (many)
Infrastructure (save/restore, archiver, configs, CUDs, StripTool, SIP, SCP support, alarm logging)
Testing – modules, drivers, and fast, synchronous software
Matlab support (offline event analysis)

17. The really big deal
Data storage for archiving (Network layout, computer center role, etc.)
Faster machines (additional load!)
NLCTA could keep a fast Sun busy AND fill any space we can give them.