1. VLSI Programming 2IMN35 Lab 1 Questionnaire
Student name 1
Student name 2

2. Replace the dots in the boxes by your answers
Replace the dots in the boxes by your answers. For physical quantities, indicate the units!
Q1: How many firstage modules are instantiated in the filter module?
Q2: See next slide.
Q3: What is the maximum sample frequency of the 32-tap filter design
according to the synthesis report?
Q4: Find out how many of the following resources are used by the design, and justify the number:
16x16 bit Multipliers.
Slice registers.

3. Replace the content of the boxes by a drawing
Q2: Draw block diagrams of the following systems, and classify each combinational path in it as:
minimum period
minimum input arrival time before clock
maximum output required time after clock
maximum combinational path delay
block diagram firstage
block diagram 32-tap FIR filter

4. Put the answer on the dots in the boxes
Put the answer on the dots in the boxes. For physical quantities, indicate the units!
Q5:
What was the duration of the sound in your original sound file?
How much simulated time did the design take to filter your sound file?
What was the sample rate of the simulated system?
Is there a relationship between sample rate and clock rate of the simulation?
What are the filter coefficients used in the test module?

5. Replace the dots in the boxes by your answers
Replace the dots in the boxes by your answers. For physical quantities, indicate the units! Q6
What is the order of the filter you just designed?
How many filter stages would be required to implement this filter?
Q7 What is the stop frequency of the filter, judging from the PSD? Q8
What is the highest frequency displayed on x-axis of the PSD graph?
Briefly explain the relationship between this frequency and the sampling frequency of 44.1kHz.

6. Replace the dots in the boxes by your answers
Replace the dots in the boxes by your answers. For physical quantities, indicate the units!
Q9 One of the filter designs is a direct-form implementation, and the other one is a transposed direct-form implementation. Which of the zip-files contained which implementation?
direct
transposed

7. Put the answer on the dots in the boxes
Put the answer on the dots in the boxes. For physical quantities, indicate the units!
Q10.1: How many firstage modules are instantiated in the filter module?
Q10.2: See next slide.
Q10.3: What is the maximum sample frequency of the 32-tap filter
design according to the synthesis report?
Q10.4: Find out how many of the following resources are used by the
design, and justify the number:
16x16 bit Multipliers.
Slice registers.

8. Replace the content of the boxes by a drawing
Q10.2: Draw block diagrams of the following systems, and classify each combinational path in it as:
minimum period
minimum input arrival time before clock
maximum output required time after clock
maximum combinational path delay
block diagram firstage
block diagram 32-tap FIR filter