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Lecture 3 VLSI Physical Design VLSI design flow VLSI physical design
Physical design flow Design style Performance-driven physical design 1/17/2019 VLSI Physical Design
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Lecture 3(cont.) VLSI design flow Discuss Figure 1.1 (p5)
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Lecture 3(cont.) VLSI physical design Discuss Figure 1.3 (p14)
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Lecture 3(cont.) Physical design flow Discuss Figure 1.4 (p16)
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Lecture 3(cont.) Design style Full custom Semi-custom
Discuss Figure 1.5 (p17) Semi-custom Gate array (Figure 1.8 and 1.7, p22-21) Standard cell (Figure 1.6, p20) FPGA (Figure 1.9, p23) 1/17/2019 VLSI Physical Design
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Lecture 3(cont.) Performance-driven physical design Layout area Time
Delay and skew Noise Signal coupling and ground bounce Low power 1/17/2019 VLSI Physical Design
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Computation complexity
Graph model Vertex or node Edge Directed edge and non-directed adge Computation complexity Polynimia Sorting problems Non-polynomial Traveling sales man problem 1/17/2019 VLSI Physical Design
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Lecture 3(cont.) Reading assignment
Read Chapter 1-3 and write a five page reading report 1/17/2019 VLSI Physical Design
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