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5x5 Pixel Array Status 4 February 2004

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Presentation on theme: "5x5 Pixel Array Status 4 February 2004"— Presentation transcript:

1 5x5 Pixel Array Status 4 February 2004
Sam Burke Sean Stromberg UCSB HEP Group UCSB ASIC BiWeekly Status Meeting

2 ASIC Progress SPDT Analog Transmission Gate Created
UCSB ASIC BiWeekly Status Meeting

3 SPDT Transmission Gate
UCSB ASIC BiWeekly Status Meeting

4 SPDT Transmission Gate
12x6.75um cell Blue: Metal1 Red: Poly1 Green: Active Pink: P+ Yellow: N Well Lt Green:Active Blk squares: Contact Wht #1: Via1 Gray: Metal2 Note: N+ not drawn? UCSB ASIC BiWeekly Status Meeting

5 SPDT Trans Gate Net List
UCSB ASIC BiWeekly Status Meeting

6 Transmission Gate Transient Response Tlh=59ps Thl=154ps
UCSB ASIC BiWeekly Status Meeting

7 PIXEL Usage 250 um Pixel Size 18 bit Counter 18*498=8964 um^2 (14%)
Area=250^2=62500 um^2 18 bit Counter 18*498=8964 um^2 (14%) Analog Circuits 10,000 um^2 est (16%) Misc. Glue Logic (7%) 10 Inverters 10*54= 540 um^2 8 DFFR 8*498= 3984 um^2 Unused Area =39012 um^2 (62%) UCSB ASIC BiWeekly Status Meeting

8 PIXEL Area Usage UCSB ASIC BiWeekly Status Meeting

9 Future Plans Continue creating new Cell Library
NMOS & PMOS Transistors Inverter1 (done) Transmission Gate (done) NAND Gate NOR Gate D Flip Flop D Flip Flop with Clear UCSB ASIC BiWeekly Status Meeting


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