1. On a Theory of Media Processing Systems Behaviour, with Applications
M.A. Weffers-Albu, J.J. Lukkien, E.F.M. Steffens, P.D.V. v.d. Stok
I will talk today about a characterization of …
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

2. Contents Domain introduction Relevant issues Related work Approach
Model
Conclusions
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

3. Domain introduction
Media Processing Applications – systems with real-time requirements
Execute on physical platform (CPU, memory, bus)
DVD
Read
Dmux
ADec
VDec
SEnh AR
Mixer
Digitizer
Enc
Writer VR
To understans the RT requirements I will give an example
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

4. Domain introduction Media Processing Applications
Physical Platform …
System composed of (independent/dependent) streaming chains which are in turn composed of streaming components that communicate via buffers. Streaming components execute on a uni-processor platform.
Every connection between two components is implemented by means of two data queues. One queue carries full packets containing the data to be sent from one component to the next (called full queue), while the second queue (the empty queue) returns empty packets to the sender component to recycle packet memory.
Execution scenario…n-m
Each component has associated a task unique fixed priority
at the beginning of the execution of the chain all full packet queues are empty and from the moment input is available, the components execute as long as input is provided
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

5. Domain introduction Media Processing Applications…
Physical Platform
System composed of (independent/dependent) streaming chains which are in turn composed of streaming components that communicate via buffers. Streaming components execute on a uni-processor platform.
Every connection between two components is implemented by means of two data queues. One queue carries full packets containing the data to be sent from one component to the next (called full queue), while the second queue (the empty queue) returns empty packets to the sender component to recycle packet memory.
Execution scenario…n-m
Each component has associated a task unique fixed priority
at the beginning of the execution of the chain all full packet queues are empty and from the moment input is available, the components execute as long as input is provided
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

6. Domain introduction Media Processing Applications…
Physical Platform
System composed of (independent/dependent) streaming chains which are in turn composed of streaming components that communicate via buffers. Streaming components execute on a uni-processor platform.
Every connection between two components is implemented by means of two data queues. One queue carries full packets containing the data to be sent from one component to the next (called full queue), while the second queue (the empty queue) returns empty packets to the sender component to recycle packet memory.
Execution scenario…n-m
Each component has associated a task unique fixed priority
at the beginning of the execution of the chain all full packet queues are empty and from the moment input is available, the components execute as long as input is provided
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

7. Domain introduction Media Processing Applications
eq2
eqn-1
fq1
eq1
fqn-1 C1 C2 Cn
fq2 …
Physical Platform …
Backward Queue
Send packet
Receive packet    
Forward Queue
Component
Processing
code 
System composed of (independent/dependent) streaming chains which are in turn composed of streaming components that communicate via buffers. Streaming components execute on a uni-processor platform.
Every connection between two components is implemented by means of two data queues. One queue carries full packets containing the data to be sent from one component to the next (called full queue), while the second queue (the empty queue) returns empty packets to the sender component to recycle packet memory.
Execution scenario…n-m
Each component has associated a task unique fixed priority
at the beginning of the execution of the chain all full packet queues are empty and from the moment input is available, the components execute as long as input is provided
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

8. Relevant Issues When constructing / modifying an application:
How much resources does the application need?
Will the application meet its timing requirements?
What is the minimum of the resources needed such that timing requirements are met?
What can one do to reduce the resource needs of the application?
What can be done to improve the measure in which the application meets timing requirements?
Need to predict, control the overall behavior of the application
So need to predict contol some para eters that represent appropriately the behavior of the system. In our case these parameters are:…
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

9. Relevant Issues Calculate / Optimize: response time of tasks, chain,
necessary and sufficient buffer capacities
number of context switches (cost associated)
Need model for dynamic behavior of system.
And we’re going to do just that by studying the influence of assigning priorities to tasks on the…
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

10. Related work Classical RT theory does not help directly
Mainly periodic independent tasks
Tasks with precedence constraints
Previous work in domain:
Estimations for some parameters (Lowet)
Reduce the problem to an equivalent one where tasks could be treated as independent periodic (Goddard, Groba).
Our approach:
Calculate parameters rather than estimate
Uses the fact that tasks are dependent rather than reduce it into a classical RT problem
Contribution of paper:
foundations of theory for engineers to reason rigorously about system behavior and associated resource needs.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

11. Approach
First step – single linear chain executing in cooperative environment
Express the execution of the system (chain) as a trace of the atomic actions taken by each component.
Analyze the system in terms of time and behaviour as a function of:
the choice of the atomic action order in the components;
the channel properties (e.g., the capacity);
the priority assignment;
the timing assignment.
Our approach is to express…
We start from considering all possible arbitrary interleavings of components actions and progressively we impose predicates such that in the end we obtain the trace that specifies the chain behavior. Finally, we present properties of this trace, which are properties of the chain execution.
We needed a way to formally express the behaviour of a chain and for this we found traces as most adequate.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

12. Approach Basic concepts
Component program example: C: {a; b; c; d;}
Component alphabet: set of actions taken by the component (A(C)={a,b,c,d}).
Alphabets disjoint:  kl, A(Ck)  A(Cl) = .
Trace of a component: sequence of actions of a component, recording its execution.
Tr(C) : {(a b c d)}
Trace prefix: Tr(C)={(abcd)}, Pref(Tr(C)) = {(a), (a b), (a b c), (a b c d)}
Prefix = State; Pref(Tr(C)) = St(Tr(C))
Parallel composition of components: arbitrary interleaving of actions:
Ck || Cl, with Ck : {a; b} and Cl : {c; d};
Tr(Ck||Cl)= {(a b c d), (a c b d), (c a d b), (c d a b), (a c d b), (c a b d)}
Program – C executes sequentially 4 basic, atomic actions a,b,c,d.
A traceset associated with a component contains all possible traces, therefore represents all possible complete executions of that component.
Then the parallel composition of these two components traces will yield the set of traces (the so called traceset) composed of all traces recording all arbitrary interleavings of the actions of components
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

13. Approach Basic concepts
Projection of a trace on an alphabet (t↑A): trace obtained by removing all actions not in A while maintaining the order given in t.
t=(abcd), A(Ck) = {a, b}, t↑A = (ab)
#(t,a) = nb. of occurences of action a in trace t.
Ci: while (true) do {
receive( fqi-1, p);
receive( eqi, q);
process_fct(p,q);
send( eqi-1, p);
send( fqi, q); }     ci 
fqi-1?
fqi!
eqi-1!
eqi?
Tr(Ci): { (fqi-1? eqi? ci eqi-1! fqi!)ω}
for 1  i  n.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

14. Approach
Express the execution of the system (chain) as trace(s) of the atomic actions taken by each component.
priority consistent traces (Tpc)
arbitrary interleavings (TIL)
channel consistent traces (Tcc)
System trace(s)
Impose
predicates
until
obtain
trace(s)
that specifies
the system behavior.
How to find the trace(s) that specify the system execution?
In the light of the basic concepts presented before, our approach for finding these traces/trace (to the problem) is to start from the traceset containing all possible interleavings yielded by the parallel composition of components and progressively impose conditions (in the form of predicates) on these traces. (until we obtain the desired trace.)
The predicates we impose specify properties/characteristics of the system and or the tasks. such as the channel constraints due to the fact that the compoennts communicate via bounded buffers and the fixed priorities assigned to the tasks.
Each time a condition is imposed on the traces of a traceset, it reduces the traceset to a new one, containing only those traces that satisfy the condition.
In the end, the traces that satisfy all conditions, specify the system behaviour.
Note that
Traceset reduceddiminished
Tpc  Tcc  Til
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

15. Arbitrary interleavings traceset (Til)
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
A = A(Ci),
Til = Tr( Ci )
Til = {s: s consists of elements of A ∧ s↑A(Ci) Tr(Ci), i, i =1..n}
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

16. Introducing channel constraints
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Scc imposes that no buffer is allowed to overflow
or underflow.
Scc(t): ( sPref(t), fqi, eqi (1≤ i < n):
0 ≤ #(t,fqi!) - #(t,fqi?) ≤ Cap( fqi) ∧
0 ≤ #(t,eqi!) - #(t,eqi?) ≤ Cap( eqi )).
Tcc = {tTil| Scc(t)} – channel consistent traces.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

17. Introducing channel constraints Definitions – ready and blocked actions
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Tcc constrained set
Given s from St(Tcc), a component Ci is ready-to-run in state s when for an action a in A(Ci) such that sa↑ A(Ci) is a state of Tr(Ci) we have that sa  St(Tcc). Also, a is called a ready action of Ci in state s.
sa ↑ A(Ci)  sa  St(Tcc)  a is a ready action in state s
If sa is not an element of St(Tcc) it is not possible to execute a in the constrained set in which case we say that Ci is blocked at a in state s of Tcc.
sa ↑ A(Ci)  sa  St(Tcc)  a is a blocked action in state s
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

18. Introducing channel constraints Properties
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
For component Ci (1< i ≤ n), blocking at eqi-1!
is not possible.
For component Ci (1< i ≤ n), blocking at fqi! is not possible.     ci 
fqi-1?
fqi!
eqi-1!
eqi?
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

19. Introducing precedence order constraints
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Priority – function returning for each component a
unique natural number.
The assignation is fixed during the entire execution of
the system.
Scp(t): ( sPref(t), ai uA: t = saiu ∧ ai A(Ci): P(Comp(ai))= max P(C)).
Limiting Tcc according to Scp gives Tpc, the priority consistent traces: Tpc = { t  Tcc| Scp(t)}.
C RR(s)
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

20. Introducing precedence order constraints Properties, Lemmas
System trace(s)
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Tpc has precisely one element. Unique trace in Tpc denoted by ρ.
Let Ci be such that ( j: j<i: P(Cj) > P(Ci)) and consider a state s of ρ such that the next action after s in Tpc is one of A(Ci). Then Cj b eqj? [in s of Tcc] for all j<i. (a)
Let Ci be such that ( j: j>i: P(Cj) > P(Ci)) and consider a state s of ρ such that the next action after s in Tpc is one of A(Ci). Then Cj b fqj-1? [in s of Tcc] for all j>i. (b)     cj 
fqj-1?
fqj!
eqj-1!
eqj?     cj 
fqj-1?
fqj!
eqj-1!
eqj?
a).
b).
 j: j <i: P(Cj) > P(Ci)
 j: j >i: P(Cj) > P(Ci)
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

21. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
Theorem. The pipeline system assumes a repetitive behavior
after a finite initialization phase. The complete behavior is
characterized by
ρ = tinit (fqm-1? eqm? cm eqm-1! tL fqm! tR)ω
Notation.
tinit – trace recording the initialization phase of the system execution.
tstable = (fqm-1? eqm? cm eqm-1! tL fqm! tR)ω.
tstable - trace recording the stable phase of the system execution.
Execution in cascade of sub-chain
- all backward queues empty. … C1
Cm-1
Execution in cascade of sub-chain
- all forward queues empty. …
Cm+1 Cn
Trace rho completely determined by the priority asignement and programs of components which are established at the design time of the chain. Implies rho can be calculated at design time
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

22. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
Theorem. The pipeline system assumes a repetitive behavior
after a finite initialization phase. The complete behavior is
characterized by
ρ = tinit (fqm-1? eqm? cm eqm-1! tL fqm! tR)ω
Notation.
tinit – trace recording the initialization phase of the system execution.
tstable = (fqm-1? eqm? cm eqm-1! tL fqm! tR)ω.
tstable - trace recording the stable phase of the system execution. …
tinit tL tR
tstable
Trace rho completely determined by the priority asignement and programs of components which are established at the design time of the chain. Implies rho can be calculated at design time
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

23. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
The length of the initialization phase in number of
actions is
The length of the initialization phase can be reduced by decreasing m or the capacity of the of the queues in the system.
The stable phase starts when Cm executes for the first time.
When Cm executes,  i: 1 ≤ i < m, L(fqi)=Cap(fqi)-1 ∧ L(eqi)=0 ∧  i: m ≤ i < n, L(fqi) = 0 ∧ L(eqi)=Cap(eqi).
+ (m-1).
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

24. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
Minimum NCS
The minimum number of context switches (NCS) during the initialization phase is achieved when m=1.
b. The minimum NCS during one iteration of tstable can be achieved either when:
i. P(C1) = min(P(Ci))
i = 1..n
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

25. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
…or when
ii. P(Cn)<P(C1)<P(C2)<…<P(Cn-1) with
i:1≤ i<n-1, Cap(fqi)=2. Pi … P1 Pn
Pn-1 Ci Cn C1
Cn-1
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

26. Stable phase characterization Theorems, Properties, Corollaries
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Stable phase characterization Theorems, Properties, Corollaries
Tradeoff
The priority assignment suggested by Corollary 10 - ii implies that all context switches caused by preemptions were eliminated, at the cost of an initialization phase.
The priority assignment suggested by Corollary 10 - ii. achieves a minimum NCS at the cost of more memory needed ( i: 1 ≤ i < n-1, Cap(fqi)=2)
Optimizing memory needs.
The minimum queue capacity necessary and sufficient for each of the queues in the chain is 1.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

27. Timing aspects Definitions
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Timing aspects
Definitions
 : A x x Til  that for each action of a component Ci returns the computation time needed to execute the action.
Schedule function  : A x x Til  of the concurrent execution of Ci, i=1..n processes on a processor. Returns the start time for each action of each component Ci within the concurrent execution of all components.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

28. Timing aspects Definitions
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Timing aspects
Definitions
Response time Ri,k of component Ci (1 i  n) that processes packet k is:
Ri,k = (fqi !k) +  (fqi !k) - (fqi-1?k).
Response time of the chain (RTC) CN as the time needed by all components in the chain to process the kth packet:
RTCk = (fqN!k) +  (fqN!k) - (fq0?k).
NAk is the number of actions occurring from arrival of packet k until the packet leaves the chain.
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

29. Timing aspects NAk is minimal for all packets k when P(C1) = min P(Ci)
System trace
arbitrary interleavings (Til)
channel consistent traces (Tcc)
priority consistent traces (Tpc)
Timing aspects
NAk is minimal for all packets k when P(C1) = min P(Ci)
RTCk is minimal for all packets k when P(C1) = min P(Ci)
i = 1..n
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019

30. Conclusions
Presented a model for the dynamic behavior of linear processing chains
Expressed the execution of a chain as a trace that can be calculated at design time.
Formally proven that the trace becomes repetitive after an initial finite prefix.
Approach allows the calculation and optimization of
The initial phase length
The necessary and sufficient capacities for the queues
Number of context switches
Number of actions between input/output of a packet (component, chain)
Response time for a packet (component, chain)
Alina Weffers-Albu,
TU/e Computer Science, System Architecture and Networking
Philips Research Laboratories Eindhoven
18 January 2019