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Published byΣαπφώ Κολιάτσος Modified over 6 years ago
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Storing Control A L U We need a memory to store control
This memory has its own address Inst memory address can be loaded Inst memory address can be incremented Inst Mem Addr WAD IAD Control Mem Unit WM EM Addr RM WAD A L U OpCode Reg File WA WR RA2 RA1 Input EI Output WOUT EALU M- EMR LDM S H I F T SC
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Exercising Control A L U Control sequences are stored in mmeory
In each clock cycle, one step is executed Sometime the address needs to be modified It uses state of the program Inst Mem Addr WAD IAD Control Mem Unit WM EM Addr RM WAD A L U OpCode Reg File WA WR RA2 RA1 Input EI Output WOUT EALU M- EMR LDM S H I F T SC
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Condition Code A L U ALU generate status bits like
carry, overflow, sign, and zero zero=1 means result from ALU is zero These bits can be used to change flow of program A new address is generated using CCs Inst Mem Addr WAD IAD Control Mem Unit WM EM Addr RM WAD A L U OpCode Reg File WA WR RA2 RA1 Input EI Output WOUT EALU M- EMR LDM S H I F T SC Cond Code
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