1. Computer Architecture and Organization: L07: Control Sequence
By: A. H. Abdul Hafez
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

2. Outlines Review of instruction set. Timing and control Control unit
Hardwired control
Programmed control
Control unit
Instruction decoder
Control sequencer
Time diagram
End
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

3. Memory Reference Instructions
SYMBOL
HEX CODE
DESCRIPTION
I=0
I=1
AND
0xxx
8xxx
AND memory word to AC
ADD
1xxx
9xxx
Add memory word to AC
LDA
2xxx
Axxx
Load memory word to AC
STA
3xxx
Bxxx
Store Content of AC in Memory
BUN
4xxx
Cxxx
Branch unconditionally
BSA
5xxx
Dxxx
Branch and Save return address
ISZ
6xxx
Exxx
Increment and Skip if zero
Where xxx represents the memory address in hexa.

4. Register Reference Instructions
SYMBOL
HEX
DESCRIPTION
CLA
7800
Clear AC
CLE
7400
Clear E
CMA
7200
Complement AC
CME
7100
Complement E
CIR
7080
Circulate right AC and E
CIL
7040
Circulate left AC and E
INC
7020
Increment AC
SPA
7010
Skip next instruction if AC positive
SNA
7008
Skip next instruction if AC negative
SZA
7004
Skip next instruction if AC zero
SZE
7002
Skip nexyt instruction if E is 0
HLT
7001
Halt computer
register reference instructions are performed in a single clock cycle.

5. I/O Instructions SYMBOL HEX DESCRIPTION INP F800 Input Character to AC
OUT
F400
Output Character from AC
SKI
F200
Skip on Input Flag
SKO
F100
Skip on Output Flag
ION
F080
Interrupt on
IOF
F040
Interrupt off
I/O instructions are performed in a single clock cycle.

6. Timing and control
The timing for all registers in the basic computer is controlled by a master clock generator
The clock pulses do not change the state of a register unles the register is enabled by a control signal ( LD, INR or CLR)
The control signals are generated in the control unit and provide control inputs for the:
multiplexers in the common bus,
control inputs in processor registers, and
microoperations for the accumulator
Control sequence is generated in hardwired control and programmed control.
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

7. Hardwired Control
The control logic is implemented with gates, flip flops, decoders, and other digital circuits.
It has the advantage that it can be optimized to produce a fast mode of operation.
Requires changes in the wiring among the various components if the design has to be modified or changed
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

8. Microprogrammed Control
The control information is stored in a control memory.
The control memory is programmed to initiate the required sequence of microoperations.
Any required changes or modifications can be done by updating the microprogram in control memory
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

9. Control Unit of “The Basic Computer”15
11-0
3x8
decoder I
Control
logic
gates D0 D7
...
T15
4x6
. . .
4-bit
Sequence
Counter (SC)
Increment (INR)
Clear (CLR)
Clock T0
instruction register (IR)
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

10. Sequence Counter
4x6
decoder
. . .
4-bit
Sequence
Counter (SC)
Increment (INR)
Clear (CLR)
Clock T0
...
As an example, consider the case where SC is incremented to provide timing signals T0,T1,T2,T3 and T4 in sequence. At time T4, SC is cleared to 0 if decoder output D3 is active
D3T4: SC  0
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

11. Timing Diagram of Sequence Counter
Example: T0, T1, T2, T3, T4, T0, T1, . . .
Assume: At time T4, SC is cleared to 0 if decoder output D3 is active
D3T4: SC  0
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

12. Why use a sequence counter?
Not all instructions are executed in one clock cycle!
This means, one instruction (an opcode) may consist of several microoperations.
Using timing steps and microoperations, we can describe the instruction fetch and execution operations. First to do is:
T0 : AR  PC
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019

13. The end of the Lecture Thanks for your time Questions are welcome
CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU
January 18, 2019