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EE 5340 Semiconductor Device Theory Lecture 23 – Spring 2011
Professor Ronald L. Carter
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Ideal 2-terminal MOS capacitor/diode
conducting gate, area = LW Vgate -xox SiO2 y L silicon substrate tsub Vsub x ©rlc L23-14Apr2011
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Band models (approx. scale)
metal silicon dioxide p-type s/c Eo Eo Eo qcox ~ 0.95 eV qcSi= 4.05eV qfm= 4.1 eV for Al Ec qfs,p Eg,ox ~ 8 eV EFm Ec EFp EFi Ev Ev ©rlc L23-14Apr2011
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Flat band condition (approx. scale)
SiO2 p-Si q(fm-cox)= 3.15 eV q(cox-cSi)=3.1eV Ec,Ox qffp= 3.95eV EFm Ec Eg,ox~8eV EFi EFp Ev Ev ©rlc L23-14Apr2011
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Equivalent circuit for Flat-Band
Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2 Debye cap, C’D,extr = eSi/LD,extr Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’D,extr ©rlc L23-14Apr2011
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Accumulation for Vgate< VFB
-xox SiO2 EOx,x<0 holes p-type Si tsub Vsub = 0 x ©rlc L23-14Apr2011
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Accumulation p-Si, Vgs < VFB
Fig 10.4a* ©rlc L23-14Apr2011
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Equivalent circuit for accumulation
Accum depth analogous to the accum Debye length = LD,acc = [eVt/(qps)]1/2 Accum cap, C’acc = eSi/LD,acc Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’acc ©rlc L23-14Apr2011
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Depletion for p-Si, Vgate> VFB
-xox SiO2 EOx,x> 0 Depl Reg Acceptors p-type Si tsub Vsub = 0 x ©rlc L23-14Apr2011
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Depletion for p-Si, Vgate> VFB
Fig 10.4b* ©rlc L23-14Apr2011
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References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986 ©rlc L23-14Apr2011
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