1. Analysis versus design
Given a system, find its properties.
The solution is unique.
Design:
Given a set of properties, come up with a system possessing them.
The solution is rarely unique.

2. The IC Design Process

3. Texas Instruments version
PG: pattern generation, also called tapeout, to generate GDS
RTM: release to manufacturing
NPD: new product development (delivery)
Texas Instruments version

4. Texas Instruments

5. Product definition & specification
Based on market study
Future market opportunities
Gaps/niches in existing products
Cost effective replacements
Customer needs to specifications
Application environment
Interfaces with other components
I/O requirements
Accuracy/linearity requirements …

6. Electrical Design
the process from the specifications to a circuit solution
Requires active and passive
device electrical models for
Creating the design
Verifying the design
Determining the robustness of the design

7. Physical Design
From electrical design to a layout pattern

8. Test Design To verify that fabricated circuit meet specifications
To characterize additional “behavior”
To trouble-shoot design
To fine tune certain parameters
To trim certain parameters
Top designers are top test engineers

9. Skill-set for Analog IC design
Good physics background
Decent math skills
Skilled in measurements
Good understanding of principles, concepts, and assumptions
Skilled in simulation
Grasp of technology and modeling
Intuition for reasonable simplifications
Audacity to try new things, but guided by theory and physics
Not afraid of failure, but methodical learning from failures/mistakes
Wide range of knowledge

10. Technology scaling The good: The bad: The challenging:
Smaller geometries
Smaller parasitics
Higher transconductance
Higher bandwidths
The bad:
Reduced voltages
Smaller channel resistances (lower gain)
More nonlinearity
Deviation from square-law behavior
The challenging:
Increased substrate noise in mixed signal applications
Threshold voltages are not scaling with power supply
Reduced dynamic range
Poor matching at minimum channel length

12. Classification of Integrated Circuits by Device Count
Nomenclature
Active Device Count
Typical Functions
SSI
1-100
Gates, OpAmps, Many linear applications
MSI
Registers, Filters, etc.
LSI
,000
Microprocessors, data converters, etc.
VLSI
>100,000
Memories, Computers, Signal Processors
SoC (System on Chip)
???
Large digital systems with embedded analog, mixed-signal, RF function, such as transceivers

13. Technology nodes Typically referred to by minimum feature size
Smallest geometry size that can be made in the horizontal direction
But vertical direction length (oxide thickness) can be much smaller
Feature size are scaled by roughly 1/√2, but rounded to some pre-agreed upon numbers
Examples: 0.5mm, 0.35mm, 0.25mm, 0.18mm, 0.13mm, 90nm, 65nm, 45nm, …

14. There are many applications with signal frequencies in the few kHz to MHz range.
Examples include automotive, automation, and more.

15. There are other things that are getting attention, some are close to real market, some are early research.
Keep track of the ITRS: International Technology Roadmaps for Semiconductors.

16. Signal naming conventions

17. Schematic Symbols

18. Circuit analysis skills
Please review materials in appendix A
Make sure you are fluent at
Nodal analysis, KCL
Mesh analysis (dual to nodal), KVL
Cascade stages
Small signal analysis, including linearization
Equivalent circuits
Miller simplification

19. Cascade
V1 =
Vout =
Vout/vin =

20. Nodal analysis
KCL at node A:
KCL at node B:
Solve for Vout/Iin =

21. Small signal analysis
The amplifier may be nonlinear, but near an operating point, it has a small signal model of: vo = Av * vin.
By definition, SSA is always linear.

22. Making
Equivalent
substitutions
Simplified
Cascade

23. Miller simplification
If v2 = K*v1
i1 = (v1-Kv1)/Z
=(1-K)v1/Z
i2 = (v2-v1/K)/Z
=(K-1)/K v2/Z

24. BASIC FABRTICATION PROCESSES
Oxide growth
Thermal diffusion
Ion implantation
Deposition
Etching
Shallow trench isolation
Epitaxy
Photolithography

25. Oxidation
The process of growing a layer of silicon dioxide (SiO2)on the surface of a silicon wafer.
Uses:
Provide isolation between two layers
Protect underlying material from contamination
Very thin oxides (100 to 1000 Å) are grown using dry-oxidation techniques.
Thicker oxides (>1000 Å) are grown using wet oxidation techniques.

26. (Thickness of SiO2 grossly exaggerated.)

27. Diffusion
Movement of impurity atoms at the surface of the silicon into the bulk of the silicon
From higher concentration to lower concentration.
Done at high temperatures: 800 to 1400 °C.

29. Infinite-source diffusion

30. Finite-source diffusion

31. Ion Implantation
The process by which impurity ions are accelerated to a high velocity and physically lodged into the target.

32. Require annealing to repair damage
Can implant through surface layers
Can achieve unique doping profile

33. Deposition Chemical-vapor deposition (CVD)
Low-pressure chemical-vapor deposition
Plasma-assisted chemical-vapor deposition
Sputter deposition
Materials deposited
Silicon nitride (Si3N4)
Silicon dioxide (SiO2)
Aluminum
Polysilicon

34. Etching To selectively remove a layer of material
But may remove portions or all of
The desired material
The underlying layer
The masking layer
Two basic types of etches:
Wet etch, uses chemicals
Dry etch, uses chemically active ionized gasses.

35. Wet Etching

36. Selectivity: Anisotropy: a and b due to finite S
c is due to non-unity A

37. Epitaxy
Epitaxial growth consists of the formation of a layer of single-crystal silicon on the surface of the silicon material so that the crystal structure of the silicon is continuous across the interfaces.
It is done externally to the material as opposed to diffusion which is internal
The epitaxial layer (epi) can be doped differently, even opposite to the material on which it is grown
It is accomplished at high temperatures using a chemical reaction at the surface
The epi layer can be any thickness, typically 1-20 microns

38. Photolithography Components Positive photoresist-
Photoresist material
Photomask
Material to be patterned (e.g., SiO2)
Positive photoresist-
Areas exposed to UV light are soluble in the developer
Negative photoresist-
Areas not exposed to UV light are soluble in the developer

39. Steps: 1. Apply photoresist 2. Soft bake
3. Expose the photoresist to UV light through photomask
4. Develop (remove unwanted photoresist)
5. Hard bake
6. Etch the exposed layer
7. Remove photoresist

40. Expose: The process of exposing selective areas to light
through a photo-mask is
called printing.
Types of printing include:
• Contact printing
• Proximity printing
• Projection printing

41. After Developing

42. After Etching

43. After Removing Photoresist