PHY and MAC Proposal for IEEE n

PHY and MAC Proposal for IEEE 802.11n
Sept 2004 PHY and MAC Proposal for IEEE n Andreas F. Molisch, Daqing Gu, Jinyun Zhang, Neelesh Mehta Mitsubishi Electric Research Laboratories (MERL) Cambridge, MA, USA (molisch, dgu, jzhang Yukimasa Nagai, Hiroyoshi Suga, Fumio Ishizu, Keishi Murakami Mitsubishi Electric Corporation 5-1-1 Ofuna, Kamakura Kanagawa, Japan, (yuki-n, hsuga, ishizu, Jianxuan Du, Ye (Geoffrey) Li Georgia Institute of Technology (jxdu, Jeffrey (Zhifeng) Tao Polytechnic University Yuan Yuan University of Maryland, College Park Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Outline Introduction Proposal for High Rate PHY
Sept 2004 Outline Introduction Proposal for High Rate PHY Baseline system Proposed technologies Statistical rate allocation RF-baseband processing for antenna selection QBD-LDPC space time coding for layered structure Summary Proposal for High Efficiency MAC MAC structure Proposed techniques ADCA for CP SCCA for CFP Frame aggregation Block ACK enhancement Conclusions Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Introduction Goals Our approach Dramatic increase of data rate in PHY
Sept 2004 Introduction Goals Dramatic increase of data rate in PHY 100 Mbps required throughput at MAC SAP High MAC efficiency and QoS Backward compatibility Compatible with existing standards Low complexity Our approach Maintain backward compatibility Rely on mature technology & existing standard framework Be innovative Develop new technologies which can be easily incorporated to achieve high data rate and high efficiency Focus on inexpensive solution Optimize the performance/cost ratio Andreas F. Molisch et al, Mitsubishi (USA, Japan)

PHY Baseline Basic MIMO-OFDM system with layered structure (VBLAST)
Sept 2004 PHY Baseline Basic MIMO-OFDM system with layered structure (VBLAST) Receiver uses linear processing and successive interference cancellation 2x2 antenna modes with 20 MHz channelization as mandatory, 3x3 and 4x4 as optional Convolutional codes, with coding rates of ½, 2/3, ¾, and 7/8, mandatory for backward compatibility. Low-density parity check (LDPC) codes as options Andreas F. Molisch et al, Mitsubishi (USA, Japan)

System Block Diagram (2x2 Case)
Sept 2004 System Block Diagram (2x2 Case) Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Proposed Key Technologies
Sept 2004 Proposed Key Technologies Statistical rate allocation for different layers RF-baseband processing for antenna selection QBD-LDPC coding for layered systems Each above technology, or any form of their combination, can be used for performance enhancement Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Sept 2004 Proposed Key Technologies Statistical rate allocation for different layers RF-baseband processing for antenna selection QBD-LDPC coding for layered systems Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Rate Allocation Problems with existing layered systems (e.g. V-BLAST)
Sept 2004 Rate Allocation Problems with existing layered systems (e.g. V-BLAST) The information rates for all layers are the same The first layer to be detected has low channel quality due to the loss of signal energy after linear nulling The errors from previous layers propagate to later layers by successive interference cancellation (SIC) Sorting layers by SNR does not improve the situation significantly in frequency-selective channels Layer-dependent rates It is proved that with instantaneous rate feedback and SIC, the layered structure can achieve the open-loop capacity Problem: requires instantaneous feedback; that can be sensitive to channel variations Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Statistical Rate Allocation
Sept 2004 Statistical Rate Allocation Our proposed solution We propose to statistically determine the optimal data rates for different layers to avoid instantaneous rate feedback Detection order of the layers is fixed; different layers cycle through different transmit antennas Different layers have different data rates that are statistically determined by the channel quality. Due to V-BLAST principle, different layers have different capacities Data rates for the layer are chosen so that meeting a certain outage probability is guaranteed! Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Transmitter Structure with Statistical Rate Allocation
Sept 2004 Transmitter Structure with Statistical Rate Allocation Data Input Demultiplexer Channel Encoder QAM Modulator P IFFT Statistical Layer Rate Allocation Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Algorithm and Advantages
Sept 2004 Algorithm and Advantages Algorithm Compute the means and variances of different layer capacities based on the past observations Determine the data rates for each layer for a given outage probability Choose the closest rate from the supported data rates set as data transmission rate Advantages No instantaneous rate feedback is needed. Thus no explicit feedback mechanism is necessary. Only the first and second moment statistics of each layer capacity are used to determine the modulation and code rate for each layer. Statistical information can be collected from ACK packets sent from the receiver. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Simulation Result Sept 2004 1000-byte packets Channel model B
Conventional system: 64 QAM, rate ¾ CC; 108 Mbps Statistical rate allocation: layer 1: 16 QAM, rate ¾ CC; 36 Mbps layer 2: 64 QAM, rate 7/8 CC; 63 Mbps rates optimized for outage probability: 1% Andreas F. Molisch et al, Mitsubishi (USA, Japan)

The First Idea: Antenna Selection
Sept 2004 The First Idea: Antenna Selection Additional costs for MIMO More antenna elements (cheap) More signal processing (Moore’s law) One RF chain for each antenna element Basic idea of antenna selection: Have many antenna elements, but select only best for down-conversion and processing Diversity order is determined by number of antenna elements, not by number of RF chains Hybrid antenna selection: select best L out of available N antenna elements, use those for processing Need as many RF chains as data streams Andreas F. Molisch et al, Mitsubishi (USA, Japan)

One Step Better: RF-Preprocessing with Antenna Selection
Sept 2004 One Step Better: RF-Preprocessing with Antenna Selection Problem with antenna selection: significant loss of SNR in correlated channels Mean SNR gain is determined by number of RF chains Our solution: Perform processing in RF domain, i.e., before selection is done Reduce implementation cost by using only phase-shifter and adder in RF processing Solution can be based on instantaneous channel state information (CSI), average CSI, or no CSI Maintains diversity gain AND mean-SNR gain Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Selection of the Preprocessing Matrix
Sept 2004 Selection of the Preprocessing Matrix No Channel Information FFT based Pre-Processing Simple Beam pattern cannot adapt to the angle of arrival Instantaneous Channel Information Orient the beams with the angle of arrival of the incoming rays Require continuous updating of entries of pre-processor 1 2 Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Channel Statistics-Based Pre-Processing
Sept 2004 Channel Statistics-Based Pre-Processing Pre-processor depends on channel statistics Orients the beam with the mean angle of arrival Optimal solution performs principal component decomposition on columns of H Advantages Continuous updating of entries of M not required Optimum patterns independent of frequency! Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Transmitter Structure
Sept 2004 Transmitter Structure Data Channel P QAM IFFT Input Encoder Modulator Joint RF- Demultiplexer baseband Processing Channel P QAM IFFT Encoder Modulator Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Simulation Result Sept 2004 1000-byte packets Channel model B, D
64 QAM, rate ¾ CC; 108 Mbps Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Why LDPC? Capacity approaching performance
Sept 2004 Why LDPC? Capacity approaching performance Parallelizability of decoding, suitable for high speed implementation Flexibility: LDPC is simply a kind of linear block code and its rate can be adjusted by puncturing, shortening, etc. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Sept 2004 Quasi-Block Diagonal LDPC Space-time Coding (QBD-LDPC) for Layered Systems Feature: The encoding of different layers is correlated as compared with conventional layered systems. Advantage: The space-time LDPC is designed such that the code can be decoded partially with the help of other layers (undecoded part) by the introduction of correlation between different layers Andreas F. Molisch et al, Mitsubishi (USA, Japan)

System Diagram for QBD-LDPC
Sept 2004 System Diagram for QBD-LDPC QAM IFFT Data Modulator Input QBD-LDPC P Space-time Encoder QAM IFFT Modulator Decoder FFT Soft Output Demodulator P - 1 + QBD-LDPC Decoder FFT Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Parity Check Structure of QBD-LDPC
Sept 2004 Parity Check Structure of QBD-LDPC Parity check matrix for conventional LDPC-coded V-BLAST. Parity check matrix for QBD-LDPC. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Encoding of QBD-LDPC Wn Hn= [Pn I] by Gaussian elimination.
Sept 2004 Encoding of QBD-LDPC Wn Hn= [Pn I] by Gaussian elimination. The parity check bits for layer n are given by Pnun+ Wn Cn-1bn-1 , where is un the input information bit vector for layer n, and bn-1 is codeword for layer n-1. With the given structure, the information about layer n-1 is also contained in layer n. Therefore, information from layer n can help decoding layer n-1. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Decoder of QBD-LDPC Sept 2004
Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Sept 2004 Decoding of QBD-LDPC The decoding is based on linear nulling and interference cancellation, which is made possible by the lower-triagular structure of the parity check matrix. The LLR’s of bits in successfully decoded subcodes are set to maximum or minimum value, depending on the output, to avoid ambiguity caused by the introduction of connection matrices The decoding of layer n is stopped as soon as is satisfied, where bn-1 is fixed based on decoded layer n-1. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Simulation Results Sept 2004 1152 bits/block Channel model F
Code rate: ½ Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Summary of PHY Technologies
Sept 2004 Summary of PHY Technologies The proposed solution provides a good tradeoff between performance, complexity and compatibility requirements and cost. Low complexity: The complexity of linear processing + SIC scales linearly with the number of layers. Low cost: Joint RF-baseband processing reduces the number of RF chains needed in antenna selection. Backward compatibility: Existent convolutional codes can be used. No explicit feedback mechanism is needed. Flexibility: Multiple modes for various number of receive antennas. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Outline Introduction Proposal for High Rate PHY
Sept 2004 Outline Introduction Proposal for High Rate PHY Baseline system Proposed technologies Statistical rate allocation RF-baseband processing for antenna selection QBD-LDPC space time coding for layered structure Summary Proposal for High Efficiency MAC MAC structure Proposed main techniques ADCA for CP SCCA for CFP Frame aggregation Block ACK enhancement Conclusions Andreas F. Molisch et al, Mitsubishi (USA, Japan)

MAC Structure Retain 802.11e super frame structure
Sept 2004 MAC Structure Retain e super frame structure Enhance e for high efficiency Maintain the same QoS support as e Backward compatible with /802.11e Superframe Superframe CFP CP CFP CP B E A C O N SCCA C F E N D ADCA B E A C O N SCCA C F E N D ADCA B E A C O N Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Proposed Main Techniques
Sept 2004 Proposed Main Techniques Adaptive Distributed Channel Access (ADCA) Sequential Coordinated Channel Access (SCCA) Frame Aggregation Efficient Block Ack All above technologies can used together or separately to increase /802.11e MAC efficiency Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Sept 2004 Proposed Main Techniques Adaptive Distributed Channel Access (ADCA) Sequential Coordinated Channel Access (SCCA) Frame Aggregation Efficient Block Ack Andreas F. Molisch et al, Mitsubishi (USA, Japan)

ADCA Overview CSMA/CA based Adaptive batch transmission QoS support
Sept 2004 ADCA Overview CSMA/CA based Proved to be a robust, scalable, wide-deployed technology Adaptive batch transmission Transmit multiple frames in one channel access Support BlockAck with adaptive block size Leverage Multi-Rate Capabilities Favor high data rate stations Provide long-term temporal fairness for low rate stations QoS support 4 access categories (AC) with different channel contention parameters, same as e Proved to be an efficient way to provide service differentiation Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Batch Size Control Sept 2004 int Bf = 0; //reference batch size
T = Bf x Sf / Rf; Transmit up to Min{ TxR/S, B } frames R > Rf B = (Bf x Sf / Rf) + credit credit < Thrsh && B < 1 Credit++; Resume backoff Max{B, 1} frames; Credit = 0 Yes No int Bf = 0; //reference batch size int Rf = 0; //reference rate int Sf = 0; //reference frame size int B = 0; //local batch size int R = 0; //loca transmission rate int S = 0; //local frame size int credit = 0; //credit counter value int Thrsh; //a constant threshold value Andreas F. Molisch et al, Mitsubishi (USA, Japan)

BlockAck for Batch Transmission
Sept 2004 BlockAck for Batch Transmission ACK Frame ACK Frame ACK Frame ACK Frame ACK Frame ACK Frame ACK Frame Immediate ACK Frame BlockACK Request BlockACK Frame BlockACK Request BlockACK Frame BlockACK Request BlockACK Batch ACK Frame No ACK Andreas F. Molisch et al, Mitsubishi (USA, Japan)

ADCA Performance Evaluation
Sept 2004 ADCA Performance Evaluation Simulation Environments Simulation platform: Ns-2 (version 2.26) Physical parameters are based upon the MERL PHY layer proposal. SIFS 16us AIFS[AC0,1] 54us DIFS 34us CWmin[AC0,1] 31 Slot Time 9us CWmax[AC0,1] 1023 ACK Size 14B AIFS[AC2] 43us MAC Header 28B CWmin[AC2] 15 Peak Data-Rate 216Mb/s CWmax[AC2] 500 Base Data-Rate 24Mb/s AIFS[AC3] PLCP Preamble Length 20us CWmin[AC3] 7 PLCP Header Length 4us CWmax[AC3] 100 Andreas F. Molisch et al, Mitsubishi (USA, Japan)

ADCA Throughput Gain Sept 2004
Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Related Message Format
Sept 2004 Related Message Format Need to modify the EDCA parameter set element in the beacon 1 Element ID (12) Length (18) Reserved Octet QoS Info AC_BE Parameter Record AC_BK AC_VI AC_VO 4 ACI/ AIFSN ECWmin/ ECWmax TXOP Limit 2 Reference Packet Size (Sf) Data Rate (Rf) Batch Size (Bf) BlockACK Size (Af) EDCA parameter set element in IEEE e Modified EDCA parameter set element for ADCA Andreas F. Molisch et al, Mitsubishi (USA, Japan)

SCCA Overview Scheduled transmission based on request
Sept 2004 SCCA Overview Scheduled transmission based on request CSMA/CA with assigned incremental backoff time to each STA Ensure parameterized QoS Combine the merits of TMDA and polling mechanisms Eliminate the polling overhead, and retain its flexibility Avoid the TDMA’s stringent synchronization, and achieve its efficiency Consist of five distinct phases Resource request Resource allocation Data transmission Resource renegotiation Resource relinquishment Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Resource Request & Allocation
Sept 2004 Resource Request & Allocation STA SCCA Controller Resource Request (RRQ) ADCA Period SIFS ACK Resource Reservation and Allocation . . . Beacon SIFS Resource Allocation (RAL) . . . SCCA Period Data Data Transmission Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Data Transmission S1 AP S2 Sept 2004 t3 t1 t0 t2 CP: ADCA CFP: SCCA
1 frame 2 S2 TXDT SIV STA 3 1 2 frame AP S1 At time t0 t0 1 frame 1 S2 TXDT SIV STA 2 NA 2 frame AP S1 At time t1 t1 NA S2 TXDT SIV STA 1 2 frame AP S1 At time t2 t2 S L O T P I F A C K S I F D T S1 P I F S B E A C O N R A L P I F S D A T C K S I F P I F S L O T S I F A C K D T C F E N D P I S AP t3 NA S2 TXDT SIV STA AP S1 At time t3 P I F S L O T S2 CFP: SCCA CP: ADCA Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Resource Renegotiation
Sept 2004 Resource Renegotiation Data from STA x ACK STA SCCA Controller Beacon Resource Allocation (RAL) SIFS . . . Resource Request (RRQ) Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Resource Relinquishment
Sept 2004 Resource Relinquishment Resource Relinquishment (RRL) ACK STA SCCA Controller Beacon Resource Allocation (RAL) SIFS Resource Relinquishment . . . Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Related Message Format
Sept 2004 Related Message Format Introduce 3 signaling messages Resource request (RRQ) Resource allocation (RAL) Resource relinquishment (RRL) Share common frame format Designed based upon IEEE e ADDTS request, ADDTS response and DELTS Common frame format Frame Control Duration DA SA BSSID Sequence Body FCS MAC Header 2 6 4 Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Related Message Format: RRQ
Sept 2004 Related Message Format: RRQ Order Information 1 Category 2 Action 3 Dialog Token 4 ~n Multi-TSPEC RRQ Message Format Octet Frame format of Multi-TSPEC 1 1 2 x 2 y Element ID Length TSPEC Bitmap 1 TSPEC 1 . . . TSPEC Bitmap n TSPEC n 3 2 2 4 4 4 4 4 TS Info Nominal MSDU Size Maximum MSDU Size Minimum Service Interval Maximum Service Interval Inactivity Interval Suspension Interval Service Start Time Frame format of TSPEC Octet 4 4 4 4 4 4 2 2 Minimum Data Rate Mean Data Rate Peak Data Rate Maximum Burst Size Delay Bound Minimum PHY Rate Surplus Bandwidth Allowance Medium Time Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Related Message Format: RAL
Sept 2004 Related Message Format: RAL Order Information 1 Category 2 Action 3 Dialog Token 4 ~n Multi-Schedule Message Format RAL 1 2 Element ID Length Multi-Schedule Element 1 Element n … 14 Multi-Schedule 2 4 Schedule Info SIV Service Interval TXDT Specification AID Schedule Information subfield Bit 0 Bit 1 - 4 Bit 5 - 6 Bit Reserved TSID Direction Schedule Information subfield Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Related Message Format: RRL
Sept 2004 Related Message Format: RRL Order Information 1 Category 2 Action 3 ~ n RRL element Message Format RRL TS Info 5 Bytes AID 2 3 element RRL Bit 1 - 4 Bit 5 - 6 Bit 7 - 8 Bit 9 Bit 10 TSID Direction Access Policy Aggregation APSD Traffic Type Bit 0 Bit Bit 16 Bit TS Info ACK Policy Schedule Reserved User Priority Bit TS Info Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Format of frame aggregation at MSDU level
Sept 2004 Frame Aggregation Frame aggregation at multilevel At MSDU and/or PSDU level In both contention period and contention free period Flexible and efficient BlockACK mechanism for frame aggregation Novel internal collision resolution mechanism Frame aggregation at MSDU level Aggregation condition: With identical traffic class and same <source, destination> pair LLC MAC PHY MSDU MPDU PSDU PPDU Frame Control Duration /ID Addr1 Addr2 Starting Sequence Addr4 Addr3 QoS Aggregated Frame Body MAC header FCS 1 MSDU AL-1 Hdr 1 2 Hdr 2 n Hdr n . . . b0 b10 b11 b15 b16 b32 Length Reserved Sequence Control More MSDU b12 Format of frame aggregation at MSDU level Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Format of frame aggregation at PSDU level
Sept 2004 Frame Aggregation Frame aggregation at PSDU level Frames can have different destination addresses, but they must be the same traffic class Frames can be the different traffic class, but they must be involved in the same internal collision  internal collision resolution. Format of frame aggregation at PSDU level … PLCP Preamble Hdr 1 PSDU 1 Tail Pad Hdr 2 2 Hdr n n 1 OFDM symbol Hdr n+1 Aggregated BlockACK Request Rate 4bits Length 13bits Parity 1bit 6bits Service 16bits 3 4 5 6 7 8 9 10 11 12 13 14 15 Scrambling Initialization Reserved AL2 parameter AL2 Parameter Explanation 00 Without level 2 aggregation 01 With level 2 aggregation. Both the current PSDU and the succeeding one have the same transmission rate. 11 With level 2 aggregation. Transmission rate needs to be changed after the current PSDU. 10 Reserved Andreas F. Molisch et al, Mitsubishi (USA, Japan)

BlockAck for Frame Aggregation
Sept 2004 BlockAck for Frame Aggregation BlockAck mechanism is tailored for frame aggregation. Aggregated BlockACK request Resolution to potential collision of multiple BlockAck messages CSMA-like, each STA is assigned with a incremental IBV (Initial Backoff value) IBVs=1, 2, 3, 4 …… Collision-free Frame Control Duration RA TA Aggregated BlockACK Request Frame Body MAC header BAR Block ACK Starting Sequence Control (TIDj) FCS Octets 2 4 … Sequence Control (TIDk) 6 b2 IBV TID Bitmap Reserved b5 b6 b11 b12 b15 Type b0 b1 Aggregated BlockAck Request Resolution to potential collision of multiple BlockAck messages S I F BlockACK from STA k Transmission of an aggregated frame from STA k+1 L O T Andreas F. Molisch et al, Mitsubishi (USA, Japan)

BlockAck for Frame Aggregation
Sept 2004 BlockAck for Frame Aggregation Contention period Support multiple traffic classes Relative sequence number BlockAck for frame aggregation in contention period Frame Control Duration RA TA BA Block ACK Starting Sequence Control (TIDj) BlockACK Bitmap 6 Octets 2 2xN … Control (TIDk) FCS 4 . . . M 1-byte-long relative sequence number = M Bytes Relative Sequence Number (6bits) Encoded TID (2bits) b2 NAK TID Bitmap Reserved b5 b6 b7 b15 Type b0 b1 Contention free period Same as our eifficient BlockAck proposal Explained in the next slide. Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Padded to the boundary of byte
Sept 2004 Efficient BlockAck The blockAck bitmap field in the legacy BlockAck frame contains more than it needs A more efficient BlockAck frame design can save more than 90% of bandwidth Single traffic class Sequence number bitmap (at most 8-byte long) for acknowledgement to 64 frames Readily extensible to support acknowledgement to more than 64 frames Enlarge the block size field in BAR/BA field Extend the sequence number bitmap to accommodate the number of frames to be acknowledged. The 2-bit type field in BAR/BA field 0x02: streamlined BlockACK 0x03: BlockAck for frame aggregation in contention free period. b2 Reserved Block Size TID b7 b8 b11 b12 b15 Type b0 b1 BAR/BA field BlockACK Bitmap Sequence Number Bitmap Padded to the boundary of byte Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Summary of Proposed MAC Techniques
Sept 2004 Summary of Proposed MAC Techniques We proposed four major enhancements for e MAC Adaptive Batch transmission Sequentially coordinated channel access & frame format Efficient and flexible frame aggregation at MSDU and/or PSDU level Efficient BlockAck All these enhancements improve e MAC efficiency while retaining the reliability, simplicity, interoperability and QoS support of /802.11e MAC Andreas F. Molisch et al, Mitsubishi (USA, Japan)

Sept 2004 Conclusions We have proposed a variety of important techniques for performance enhancements to both PHY and MAC These techniques can be individually or jointly included in the upcoming n standard We will continue to develop further enhancements for possible adoption We are open for any collaboration to establish a baseline proposal for n standard Andreas F. Molisch et al, Mitsubishi (USA, Japan)

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