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FPGA-Based Arcade Emulation
Danny Funk, Cory Mohling, Tony Milosch, David Gartner, John Alexander Advisor: Philip Jones Client: Joseph Zambreno
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Project Objective Goal Problem
Showcase the capabilities of reconfigurable computing platforms Problem Continue 09/10 Senior Design team’s NES Emulation through FPGA Create Arcade Machine that can be put on display
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Requirements and Specs
FPGA: All emulation in hardware on board. Emulator: Support original NES instruction set and run ROM files I/O Controls: Arcade style controls supported with same functionality as original controller Bootloader: processor to load selected games from compact flash card Cabinet: Support 103lb monitor and standard 120VAC power source
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Project Plan Emulator Adding additional functionality to get more games to work Perform validation through system debugging Bootloader Loading games ROMs into system memories Create GUI for selecting games Cabinet Construct cabinet to client’s specifications
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Project Modules Boot Loader Controls (I/O)
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System Design
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Emulator Continuing to struggle with timing and integration
Found several unit tests on NESdev.com to fix timing issues Fixed how PPU reads memory inside state machine
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Bootloader Compact Flash
Read from ROM and split into init files that the system design requires XTFT Libraries Reading images from compact flash into memory. Copying from memory to frame buffer, and displaying image using XTFT
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Cabinet Cabinet Construction
Started cabinet construction, all pieces cut out Cabinet Design Designed custom art for cabinet
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Questions
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