1. CS61C – Machine Structures Lecture 1 – Introduction
8/25/2003
 Brian Harvey (
John Wawrzynek 
(Warznek) (
www-inst.eecs.berkeley.edu/~cs61c/
Greet class

2. What are “Machine Structures”?
Application (ex: browser)
61C
Operating
Compiler
System
(Windows 2K)
Software
Assembler
Instruction Set
Architecture
Hardware
Processor
Memory
I/O system
Datapath & Control
Digital Design
Circuit Design
transistors
Coordination of many
levels (layers) of abstraction

3. 61C Levels of Representation
temp = v[k];
v[k] = v[k+1];
v[k+1] = temp;
High Level Language Program (e.g., C)
Compiler
lw $t0, 0($2)
lw $t1, 4($2)
sw $t1, 0($2)
sw $t0, 4($2)
Assembly Language Program (e.g.,MIPS)
Assembler
Machine Language Program (MIPS)
Machine Interpretation
wire [31:0] dataBus;
regFile registers (databus);
ALU ALUBlock (inA, inB, databus);
Hardware Architecture Description (e.g., Verilog Language)
Architecture Implementation
wire w0;
XOR (w0, a, b);
AND (s, w0, a);
Logic Circuit Description (Verilog Language)

4. Anatomy: 5 components of any Computer
Personal Computer
Keyboard, Mouse
Computer
Processor
Memory
(where
programs,
data
live when
running)
Devices
Disk (where
programs,
data
live when
not running)
Control
(“brain”)
Input
That is, any computer, no matter how primitive or advance, can be divided into five parts:
1. The input devices bring the data from the outside world into the computer.
2. These data are kept in the computer’s memory until ...
3. The datapath request and process them.
4. The operation of the datapath is controlled by the computer’s controller.
All the work done by the computer will NOT do us any good unless we can get the data back to the outside world.
5. Getting the data back to the outside world is the job of the output devices.
The most COMMON way to connect these 5 components together is to use a network of busses.
Datapath
(“brawn”)
Output
Display, Printer

5. Overview of Physical Implementations
The hardware out of which we make systems.
Integrated Circuits (ICs)
Combinational logic circuits, memory elements, analog interfaces.
Printed Circuits (PC) boards
substrate for ICs and interconnection, distribution of CLK, Vdd, and GND signals, heat dissipation.
Power Supplies
Converts line AC voltage to regulated DC low voltage levels.
Chassis (rack, card case, ...)
holds boards, power supply, provides physical interface to user or other systems.
Connectors and Cables.

6. Integrated Circuits (2003 state-of-the-art)
Primarily Crystalline Silicon
1mm - 25mm on a side
feature size ~ 0.13um = 0.13 x m
M transistors
( M “logic gates")
conductive layers
“CMOS” (complementary metal oxide semiconductor) - most common.
Bare Die
Chip in Package
Package provides:
spreading of chip-level signal paths to board-level
heat dissipation.
Ceramic or plastic with gold wires.

7. Printed Circuit Boards
fiberglass or ceramic
1-20 conductive layers
1-20in on a side
IC packages are soldered down.

8. Technology Trends: Memory Capacity (Single-Chip DRAM)
year size (Mbit)
1986 1
1989 4
Now 1.4X/yr, or 2X every 2 years.
8000X since 1980!

9. Technology Trends: Microprocessor Complexity
Itanium 2: 410 Million
Athlon (K7): 22 Million
Alpha 21264: 15 million
Pentium Pro: 5.5 million
PowerPC 620: 6.9 million
Alpha 21164: 9.3 million
Sparc Ultra: 5.2 million
Moore’s Law
2X transistors/Chip
Every 1.5 years
Called
“Moore’s Law”

10. Technology Trends: Processor Performance
Intel P MHz
(Fall 2001)
1.54X/yr

11. Computer Technology - Dramatic Change!
Processor
2X in speed every 1.5 years (since ‘85); 100X performance in last decade.
Memory
DRAM capacity: 2x / 2 years (since ‘96); 64x size improvement in last decade.
Disk
Capacity: 2X / 1 year (since ‘97)
250X size in last decade.

12. Computer Technology - Dramatic Change!
State-of-the-art PC when you graduate (at least):
Processor clock speed: MegaHertz (5.0 GigaHertz)
Memory capacity: MegaBytes (4.0 GigaBytes)
Disk capacity: 2000 GigaBytes (2.0 TeraBytes)
New units! Mega => Giga, Giga => Tera

13. CS61C: So what's in it for me?
Learn some of the big ideas in CS & engineering:
5 Classic components of a Computer
Data can be anything (integers, floating point, characters): a program determines what it is
Stored program concept: instructions just data
Principle of Locality, exploited via a memory hierarchy (cache)
Greater performance by exploiting parallelism
Principle of abstraction, used to build systems as layers
Compilation v. interpretation thru system layers
Principles/Pitfalls of Performance Measurement
We will take a break and talk about class philosophy.

14. Others Skills learned in 61C
Learning C
If you know one, you should be able to learn another programming language largely on your own
Given that you know C++ or Java, should be easy to pick up their ancestor, C
Assembly Language Programming
This is a skill you will pick up, as a side effect of understanding the Big Ideas
Hardware design
We think of hardware at the abstract level, with only a little bit of physical logic to give things perspective
CS 150, 152 teach this

15. Course Lecture Outline
Number representations
C-Language (basics + pointers)
Storage management
Assembly Programming
Floating Point
Performance
I/O Interrupts
Disks, Networks
Caches
Virtual Memory
CPU organization
Introduction to Verilog (HDL)
Pipelining
Logic Design
Advanced Topics
Brian and I will take turns covering these topics.

16. Reading assignments on handout, in reader, and on web page
Texts
Required: Computer Organization and Design: The Hardware/Software Interface, Second Edition, Patterson and Hennessy (COD)
Required: The C Programming Language, Kernighan and Ritchie (K&R), 2nd edition
Reading assignments on handout, in reader, and on web page
Read P&H Chapter 1 and sections 4.1 & 4.2, and K&R Chapters 1-4 as soon as possible this week.

17. Tried-and-True Technique: Peer Instruction
Increase real-time learning in lecture, test understanding of concepts vs. details
As complete a “segment” ask multiple choice question
1-2 minutes to decide yourself
3 minutes in pairs/triples to reach consensus. Teach others!
5-7 minute discussion of answers, questions, clarifications

18. Class Meetings
Monday Lecture
Discussion Session (1 hour), Mon. or Tue.
Wednesday Lecture
Lab Session (2 hours), Wed. or Thur.
Friday Lecture
There IS discussion and lab this week…

19. Homework, Labs and Projects
Lab exercises (every week)
Homework exercises (every week)
Due Monday Mornings.
HW1 is included in the handout, and posted on the webpage (Due Wednesday next week only.)
Projects (every 2 to 3 weeks)
All exercises, reading, homeworks, projects in course reader and on course web page.

20. Midterm 1: Tu 7pm Oct 7th, room TBA
3 Course Exams
Midterm 1: Tu 7pm Oct 7th, room TBA
Give 2 hours for 1 hour exam
Open Book / Notes
Review sessions TBA
Midterm 2: Th 7pm Nov 13th, room TBA
Final: Wed Dec 10, 8-11am
First week after final class.
You’ll be done with 61C early.
This is the 1st slide of the “Course Structure and Course Philosophy” section of the lecture.
Need to emphasis that for exams, our goal is the test your knowledge. It is not our goal to test how well your perform under time pressure.

21. Your final grade Grading
15 Homeworks 15 x pts.
6 Projects 6 x 10 60
2 Midterms 2 x 30 60
Final exam 50
TOTAL
Grade distributions. Absolute scale – no curve.
> 180 A+
175 A
170 A-
165 B+ .
125 D-

22. Course Problems…Cheating
What is cheating?
Studying together in groups is encouraged.
Turned in work must be your own.
Common examples of cheating: running out of time on a assignment and then pick up output, take homework from box and copy, person asks to borrow solution “just to take a look”, copying an exam question, …
Cheating on homeworks; -4 points for that assignment
Cheating on projects / exams; At least, 0 points for that project / exam. In most cases, F in the course.
For serious and repeated instances will refer you to Office of Student Judicial Affairs.

23. We will not be enforcing the CS61B prerequisite this semester.
Enrollment
We will not be enforcing the CS61B prerequisite this semester.
Our goal is to accommodate everyone on the wait list.
Two new sections have been added:
018 LAB W 12-2P, 271 SODA
118 DIS M 1-2P, 3102 ETCHEVERRY
019 LAB W 6-8P, 271 SODA
119 DIS M 6-7P, 3 EVANS

24. Teaching Assistants
Dan Adkins (also Head TA)
Paul Burstein
Michael Hamler
Benjamin Huang
Alexandre Joly

25. Processor Summary Continued rapid improvement in Computing
2X every 1.5 years in processor speed; every 2.0 years in memory size; every 1.0 year in disk capacity; Moore’s Law enables processor (2X transistors/chip ~1.5 yrs)
5 classic components of all computers
Control Datapath Memory Input Output
Processor