1. Word Assembly from Narrow Chipst A d d r e s s R / W C S C S C S R / W R / W
. . . R / W A d d r e s s A d d r e s s A d d r e s s D a t a D a t a D a t a s s s p s
P chips expand word size from s bits to p x s bits.

2. CS501 Advanced Computer Architecture
Lecture 38
Dr.Noor Muhammad Sheikh

3. Review

4. Cost of pins on a chip encourages narrow words for high capacity memory.
Adding a data pin to a chip increases the number of bits it can store.

5. Read only Memory

6. Memory Hierarchy

7. Cache Memory

8. Memory Module

9. More chip capacity can be accommodated with fewer pins by increasing the address size rather than the word size.

10. Example Consider 4 chips with s=4, word size = 4bits
Data bus = 16bits, o/p = 16 bits
With SRAM chip no refresh required.
With DRAM chip, RAS and CAS coordination.

11. Increasing the Number of Words by a Factor of 2k

12. Figure 7.19 (jordan)

13. Chip Matrix Using Two Chip Selects
address
m+q+k
Horizontal
decoder k m
R/W
cs1
cs2
address q A
R/W
Data
Vertical
decoder s
One of 2m+q+k
S-bit words

14. A Memory Module and Its Interface
Address
k+m
Address register k m
Chip/board
selection
Module
select
Memory boards
and/or
chip
Control
Signal
generator
Read
Write
Ready w
Data register
Data w

15. Dynamic RAM Module with Refresh Controlk + m R a W i y D w / 2 f h n q G g C p b x B S

16. Two Kinds of Memory Module Organizationsj k M o d u l e s b m A r + = - i t a c 1 2 – ( ) C n v w g h
. .

17. A 2-D CMOS ROM Chip + v
Address
Row
decoder CS 1 1

18. The cache mapping function
CPU
Word
cache
Main Memory
Block
address
Mapping function

19. Cache operation are transport to the running program.
The program issues effective addresses and read or write requests, and these requests are satisfied by memory
Whether it is the cache or main memory that satisfies the request is unknown to the program
The cache blocks are sometimes referred to as cache lines

20. Continued Cache mapping is responsible for all the cache operations.
Cache is implemented in hardware to achieve high speed operation.

21. Mapping function determines the following:
Placement strategies
Replacement strategies
Read and write policies