1. Rail-to-rail Input Stage
From last time:
Vo follows Vi
Vo range limited
by V+ range of
error amplifiers
Overall Vo range equal to overlap of the ICMR of the two error amplifiers
To achieve rail-to-rail Vo swing, we need rail-to-rail input common mode range

2. GERAL LOW VOLTAGE OP AMPS
We will cover:
Low voltage input stages
Low voltage bias circuits
Low voltage op amps
Examples
Methodology:
Modify standard circuit blocks for reduced power supply voltage
Explore new circuits suitable for low voltage design

3. Low-Voltage, Strong-Inversion Operation
Reduced power supply means decreased dynamic range
Nonlinearity will increase because the transistor is working close to VDS(sat)
Large values of λ because the transistor is working close to VDS(sat)
Increased drain-bulk and source-bulk capacitances because they are less reverse biased.
Large values of currents and W/L ratios to get high transconductance
Small values of currents and large values of W/L will give smallVDS(sat)
Severely reduced input common mode range
Switches will require charge pumps

4. Input common mode range drop
VDD – VDS3sat + VT1 > vicm > VDS5sat + VT1 + Von1
> vicm > , unsymmetric!

5. p-n complementary input pairs
n-channel: vicm > VDSN5sat + VTN1 + VonN1
p-channel: vicm <VDD- VDSP5sat - VTP1 - VonP1

6. Non-constant input gm N

7. constant input gm solution
Let Vb1 depends on Vicm so that Mb1 is turned on when MN1,2 are turned off, and Ip becomes 4 times.
Similarly when MP1,2 are off, In becomes 4 times.
When both pair on, In and Ip are bothe 1 times

8. Set VB1 = Vonn and VB2 = Vonp

9. Rail-to-rail constant gm input
When both on, I5=I1=I12=IBP=Ip; I11=I7=I6=IBN=In
As Vin+ and Vin- reduce, MN1,2 begins to turn off, MNC1,2 also begins to turn off. I7 reduces, so does I8. I9 = I12-I8 increases, so does I10, which is 3(I12-I8)=3(Ip-In), which becomes 3Ip when n-pair turns off.

10. Complementary input stage with rail-to-rail Vicmr and constant gm
aIp Ip
aIn
3(Ip-In)
aIn
a(Ip-In) BP
Vbp
in+
in-
NC1,2
PC1,2 N1 P1 P2 N2
Vi+
Vi-
Vi+
Vi-
Vi-
Vi+
ip+
ip- BN
Vbn
3(In-Ip)
aIp
aIn In
aIp
a:3 1 2 3 4
a(In-Ip)

11. Complementary input stage with rail-to-rail Vicmr and constant gm
b:a
3:a
bIp Ip
aIn
3(Ip-In)
bIn
a(Ip-In) BP
Vbp
in+
in-
NC1,2
PC1,2 N1 P1 P2 N2
Vi+
Vi-
Vi+
Vi-
Vi-
Vi+
ip+
ip- BN
Vbn
3(In-Ip)
aIp
aIn In
bIp
b:3 1 2 3 4
b(In-Ip)
b:a

12. Rail-to-rail constant gm input
Coban and Allen, 1995

13. Other issues
In the normal case (both pairs on), the sensing and control circuit consumes 2X current of the input pairs
The current in the cascode transistors changes significantly with the common mode. Gain will change also.
Tail current change with ICM causes SR to change with ICM
CMRR not very good.
Constant gm relies on gmp-gmn match

14. Cascode tail current to improve common mode rejection
Need to cascode all 4 tail current sources, and possibly others.
But which one?

15. Complementary input stage with rail-to-rail Vicmr and constant gm
b:a
3:a
bIp Ip
aIn
3(Ip-In)
bIn
a(Ip-In) BP
Vbp
in+
in-
NC1,2
PC1,2 N1 P1 P2 N2
Vi+
Vi-
Vi+
Vi-
Vi-
Vi+
ip+
ip- BN
Vbn
3(In-Ip)
aIp
aIn In
bIp
b:3 1 2 3 4
b(In-Ip)
b:a

16. Dual n-channel input for PVT-R
Vss 
Vbc + Veb1
Vbc + Veb1 
Vdd – Vdsat5 + Vth1
Ifc Ii
Vins+ and Vins- are shifted up by about Vbc + Veb1=Vthn+Veb13+Veb13c+Veb2

17. Here:
Vins+ and Vins- are shifted up by Vthp+Veb5, which can be made to be about Vthn+Veb13+Veb13c+Veb2

18. Level Shifter Analysis
Transfer Function
Pole
Zero
Model
Since |p|<|z|, there is phase delay. Delay is max at sqrt(pz).
To make delay small enough, need |p| >> UGF of Ab.
So make gm large, and Cgs large relative to CL.
What is RL? What about gmb effect?

19. When Vin+ and Vin- are high, MS3 and MS4 are fully on.
All the current in MS3&4 are mirrored to MS6.
MS7 will have 0 current, so does MS8. That turns off the shift-input pair.
As Vin+- drop, the right tail current source is pushed into triode. I_MS5 decreases, I_MS7 increases, and the shift-input pair is being turned on.
The transition range depends on Veb of tail cascode and of input pair.
When both pairs are partially on, there is no high impedance node.

20. Will this work?

21. Bulk-Driven MOSFET

22. Bulk-Driven, n-channel Differential Amplifier
I1=I2=I5/2
As Vic varies, Vd5 changes and gmb varies 
Varied gain, slew rate, gain bandwidth; nonlinearity; and difficulty in compensation

23. Bulk-driven current mirrors
Increased vin range and vout range

24. Traditional techniques for wide input and output voltage swings
Iin+Ib Ib Ib
Iin
VT+2Von
>2Von
1/4 1 + 1
VT+Von
Von –
Von
VT+Von 1 1

25. Traditional techniques for wide input and output voltage swings
Iin
Iin Ib Ib +
VT+2Von Io
Veb
>2Von –
1/4 1
Von
Von
VT+Von 1 1

26. A 1-Volt, Two-Stage Op Amp
Uses a bulk-driven differential input pair, wide swing current mirror load, and emitter follower level shifter

27. Op Amp Performance

28. Frequency Response

29. Low voltage VBE and PTAT reference

30. Common mode feedback for low voltage

31. 1.5v op amp for 13bit 60 MHz ADC

32. Output Stage and CMFB

33. Folded cascode with AB output
Lotfi 2002

34. Simulated performance
0.25 um process
1.5 V power supply
82 dB DC gain
2 V p-p diff output swing
170 MHz 10 pF load
77o PM with b = 1/5
0.02% 1V step settling time: 8.5 ns
Full output swing Op Amp power: 25 mW

35. Differential difference input AB output
Alzaher 2002

36. LOW POWER OP AMPS Op Amp Power = (VDD-VSS)*Ibias
Reduce supply voltage: effect is small
Many challenges in low voltage design same as before
Reduce bias: factor of hundred reduction
Weak inversion operation
Nano-amp to small micro-amp currents
Needs small current biasing circuits and small current reference generators
Needs output stage to drive the load
Design it so that it consume tiny quiescent power
But generate sufficient current for large signals
Tradeoff speed for reduced power

37. Sub-threshold Operation
Most micro-power op amps use transistors in the sub-threshold region.
np~1.5; nn~2.5

38. Two-Stage, Miller Op Amp in Weak Inversion
At VDD-VSS=3V, ID5=0.2uA, ID7=0.5uA, got A=92dB, GB=50KHz, P=2.1uW

39. Push-Pull Output in Weak Inversion
First stage gain
Total gain
S=W/L

40. Increasing gain What is VON? L5=L12, W12=W5/2 S13<<S4 go
Gain=gm/go