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Instructor: Alexander Stoytchev
CprE 281: Digital Logic Instructor: Alexander Stoytchev
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Incompletely Specified Functions & Multiple-Output Circuits
CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev
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Administrative Stuff HW4 is out It is due on Monday Sep 18 @ 4pm.
Please write clearly on the first page (in block capital letters) the following three things: Your First and Last Name Your Student ID Number Your Lab Section Letter Also, staple all of your pages together
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Administrative Stuff Midterm Exam #1 When: Friday Sep 22.
Where: This classroom What: Chapter 1 and Chapter 2 plus number systems The exam will be open book and open notes (you can bring up to 3 pages of handwritten notes). Sample exams are posted on the class web page
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Topics for the Midterm Exam
Binary Numbers Octal Numbers Hexadecimal Numbers Conversion between the different number systems Truth Tables Boolean Algebra Logic Gates Circuit Synthesis with AND, OR, NOT Circuit Synthesis with NAND, NOR Converting an AND/OR/NOT circuit to NAND circuit Converting an AND/OR/NOT circuit to NOR circuit SOP and POS expressions
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Topics for the Midterm Exam
Mapping a Circuit to Verilog code Mapping Verilog code to a circuit Multiplexers Venn Diagrams K-maps for 2, 3, and 4 variables Minimization of Boolean expressions using theorems Minimization of Boolean expressions with K-maps Incompletely specified functions (with don’t cares) Functions with multiple outputs
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Quick Review
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The Combining Theorems of Boolean Algebra
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One-Variable K-map (a) Truth table (b) Karnaugh map x x m 1 1 m m m 1
m 1 1 m m m 1 1 (a) Truth table (b) Karnaugh map
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One-Variable K-map x 1 x 1 1 1 1 1 x1 (a) Truth table (b) Karnaugh map
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Two-Variable K-map (a) Truth table (b) Karnaugh map x x x x m 1 1 m m
2 x 1 x 2 m 1 1 m m m 1 2 1 m 2 1 m m 1 3 1 1 m 3 (a) Truth table (b) Karnaugh map [ Figure 2.49 from the textbook ]
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Two-Variable K-map 1 [ Figure 2.50 from the textbook ]
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These are all valid groupings
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These are also valid But try to use larger rectangles if possible.
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These two are not valid
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Three-Variable K-map [ Figure 2.51 from the textbook ]
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Location of three-variable minterms
Notice the placement of Variables Binary pair values Minterms
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Adjacency Rules As if the K-map were adjacent drawn on a cylinder
columns
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Adjacency Rules m0 m2 m4 m1 m3 m5 As if the K-map were adjacent
drawn on a cylinder adjacent columns
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Three-Variable K-map [ Figure 2.52 from the textbook ]
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Two Different Ways to Draw the K-map
x2x3 x1 00 01 11 10 m0 m1 m3 m2 1 m4 m5 m7 m6
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Another Way to Draw 3-variable K-map
x1 x2x3 1 00 m0 m4 01 m1 m5 11 m3 m7 10 m2 m6
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Gray Code Sequence of binary codes
Consecutive lines vary by only 1 bit 000 001 011 010 110 111 101 100 00 01 11 10
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Gray Code & K-map s x1 x2
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Gray Code & K-map s x1 x2 000 010 110 100 001 011 111 101
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differ only in the LAST bit
Gray Code & K-map s x1 x2 000 010 110 100 001 011 111 101 These two neighbors differ only in the LAST bit
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differ only in the LAST bit
Gray Code & K-map s x1 x2 000 010 110 100 001 011 111 101 These two neighbors differ only in the LAST bit
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differ only in the FIRST bit
Gray Code & K-map s x1 x2 000 010 110 100 001 011 111 101 These two neighbors differ only in the FIRST bit
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differ only in the FIRST bit
Gray Code & K-map s x1 x2 000 010 110 100 001 011 111 101 These two neighbors differ only in the FIRST bit
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Gray Code & K-map s x1 x2 These four neighbors
000 010 110 100 001 011 111 101 These four neighbors differ in the FIRST and LAST bit They are similar in their MIDDLE bit
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A four-variable Karnaugh map
[ Figure 2.53 from the textbook ]
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A four-variable Karnaugh map
x1 x2 x3 x4 m0 1 m1 m2 m3 m4 m5 m6 m7 m8 m9 m10 m11 m12 m13 m14 m15
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Gray Code & K-map x1 x2 x3 x4 m0 1 m1 m2 m3 m4 m5 m6 m7 m8 m9 m10 m11
m0 1 m1 m2 m3 m4 m5 m6 m7 m8 m9 m10 m11 m12 m13 m14 m15
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Gray Code & K-map x1 x2 x3 x4 m0 1 m1 m2 m3 m4 m5 m6 m7 m8 m9 m10 m11 m12 m13 m14 m15 0000 0100 1100 1000 0001 0101 1101 1001 0011 0111 1111 1011 0010 0110 1110 1010
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Adjacency Rules adjacent rows adjacent columns adjacent columns
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Adjacency Rules adjacent rows As if the K-map were drawn on a torus
columns
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Adjacency Rules m8 m10 m0 m2 m14 m12 m6 m4 adjacent rows
As if the K-map were drawn on a torus adjacent columns
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Example of a four-variable Karnaugh map
[ Figure 2.54 from the textbook ]
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Other Four-Variable K-map Examples
[ Figure 2.54 from the textbook ]
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Strategy For Minimization
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Grouping Rules Group “1”s with rectangles Both sides a power of 2:
1x1, 1x2, 2x1, 2x2, 1x4, 4x1, 2x4, 4x2, 4x4 Can use the same minterm more than once Can wrap around the edges of the map Some rules in selecting groups: Try to use as few groups as possible to cover all “1”s. For each group, try to make it as large as you can (i.e., if you can use a 2x2, don’t use a 2x1 even if that is enough).
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Terminology _ Literal: a variable, complemented or uncomplemented
Some Examples: X1 X2 _
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Terminology Implicant: product term that indicates the input combinations for which the function output is 1 Example x indicates that x1x2 and x1x2 yield output of 1 _ _ _ _ x 2 1
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Terminology Prime Implicant Prime Not prime
Implicant that cannot be combined into another implicant with fewer literals Some Examples x 1 2 3 00 01 11 10 x 1 2 3 00 01 11 10 Prime Not prime
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Terminology Essential Prime Implicant
Prime implicant that includes a minterm not covered by any other prime implicant Some Examples x 1 2 3 00 01 11 10
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Terminology Cover Collection of implicants that account for all possible input valuations where output is 1 Ex. x1’x2x3 + x1x2x3’ + x1x2’x3’ Ex. x1’x2x3 + x1x3’ x 1 2 3 00 01 11 10
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Example Give the Number of Implicants? Prime Implicants?
Essential Prime Implicants? x 1 2 3 00 01 11 10
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Why concerned with minimization?
Simplified function Reduce the cost of the circuit Cost: Gates + Inputs Transistors
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Three-variable function f(x1, x2, x3) = ∑m(0, 1, 2, 3, 7)
[ Figure 2.56 from the textbook ]
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Example x x 1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1
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Example x x 1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1
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Example x x x x 00 01 11 10 00 1 1 x x x 01 1 1 x x x 11 1 1 x x x 10
2 x x 3 4 00 01 11 10 00 1 1 x x x 1 3 4 01 1 1 x x x 2 3 4 11 1 1 x x x 1 3 4 10 1 1 x x x 2 3 4
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Example f = + x x x x 00 01 11 10 00 1 1 x x x 01 1 1 x x x 11 1 1 x x
2 x x 3 4 00 01 11 10 00 1 1 x x x 1 3 4 01 1 1 x x x 2 3 4 11 1 1 x x x 1 3 4 10 1 1 x x x 2 3 4 x 1 3 4 2 f = +
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Example: Another Solution
1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1
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Example: Another Solution
1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1 [ Figure 2.59 from the textbook ]
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Example: Another Solution
1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1 x x x x x x 1 2 4 1 2 4 x x x x x x 1 2 3 1 2 3
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Example: Another Solution
1 2 x x 3 4 00 01 11 10 00 1 1 01 1 1 11 1 1 10 1 1 x x x x x x 1 2 4 1 2 4 x x x x x x 1 2 3 1 2 3 x 1 2 4 3 + f =
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Example: Both Are Valid Solutions
1 2 x x 3 4 00 01 11 10 00 1 1 x x x 1 3 4 01 1 1 x x x 2 3 4 11 1 1 x x x 1 3 4 10 1 1 x x x 2 3 4 x x x x x x 1 2 4 1 2 4 x x x x x x 1 2 3 1 2 3 [ Figure 2.59 from the textbook ]
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Example: Both Are Valid Solutions
1 2 x x 3 4 00 01 11 10 00 1 1 x x x 1 3 4 01 1 1 x x x 2 3 4 11 1 1 x x x 1 3 4 10 1 1 x x x 2 3 4 x x x x x x 1 2 4 1 2 4 x x x x x x 1 2 3 1 2 3 x 1 3 4 2 f = + x 1 2 4 3 + f =
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Example: Incompletely Specified Function
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Three Ways to Specify the Function
f(x1, x2, x3, x4) = Σ m(2, 4, 5, 6, 10) + D(12, 13, 14, 15)
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Three Ways to Specify the Function
f(x1, x2, x3, x4) = Σ m(2, 4, 5, 6, 10) + D(12, 13, 14, 15) x 1 2 3 4 00 01 11 10 d
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SOP implementation x 00 01 11 10 d (a) SOP implementation 1 2 3 4
00 01 11 10 d (a) SOP implementation [ Figure 2.62 from the textbook ]
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POS implementation x ( ) 00 01 11 10 d + (b) POS implementation 1 2 3
4 00 01 11 10 d + ( ) (b) POS implementation [ Figure 2.62 from the textbook ]
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Example: A circuit with multiple outputs
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Seven-Segment Indicator
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Seven-Segment Indicator
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Seven-Segment Indicator
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Seven-Segment Indicator
d d d d d d d d d d d d d d d d d d d d d
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Seven-Segment Indicator
d d d d d d d d d d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 d d d d d d d d d d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 d d d d d d d d d d d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 d d d d d d d d d d d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 1 d d d d d d 1 d d d d d d In this case all d's were treated as 1's.
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Seven-Segment Indicator
1 d d d d d d 1 d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 1 d d d d d d 1 d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 d 1 d d d d d d 1 d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 d 1 d d d d d d 1 d d d d d d d d d d d d
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Seven-Segment Indicator
x 3 2 1 00 01 11 10 1 d d d d d 1 d d d d d d d d d d 1 d d d d d d d d d d 1 d d d d d In this case some d's were treated as 1's, others as 0's.
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Seven-Segment Indicator
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Another Example
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[ Figure 2.64 from the textbook ]
1 2 3 4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f [ Figure 2.64 from the textbook ]
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x 00 01 11 10 (a) Function f x 00 01 11 10 (b) Function f 1 2 3 4 1 2
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_ x1 x3 x 00 01 11 10 (a) Function f x 00 01 11 10 (b) Function f 1 2
4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f x1 x3 _
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_ x1 x3 x 00 01 11 10 (a) Function f x 00 01 11 10 (b) Function f 1 2
4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f x1 x3 _
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_ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function f x 00 01 11 10
2 3 4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f x1 x3 _ x1 x3 _
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_ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function f x 00 01 11 10
2 3 4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f x1 x3 _ x1 x3 _
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_ x1 x3 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function f x 00 01 11 10
2 3 4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 f 1 2 x 3 4 (c) Combined circuit for and x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 f 1 2 x 3 4 (c) Combined circuit for and x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 f 1 2 x 3 4 (c) Combined circuit for and x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 f 1 2 x 3 4 (c) Combined circuit for and x1 x3 _ x1 x3 _
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_ x1 x3 _ x2 x3 x4 x2 x3 x4 _ _ x1 x3 x1 x3 x 00 01 11 10 (a) Function
(b) Function f x2 x3 x4 _ x2 x3 x4 f 1 2 x 3 4 (c) Combined circuit for and x1 x3 _ x1 x3 _
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(c) Combined circuit for and [ Figure 2.64 from the textbook ]
1 2 3 4 00 01 11 10 (a) Function f x 1 2 3 4 00 01 11 10 (b) Function f f 1 2 x 3 4 (c) Combined circuit for and [ Figure 2.64 from the textbook ]
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Yet Another Example
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Individual vs Joint Optimization
x x x x 1 2 1 2 x x x x 3 4 00 01 11 10 3 4 00 01 11 10 00 00 01 1 1 1 01 1 1 1 11 1 1 1 11 1 1 1 10 1 10 1 (a) Optimal realization of f (b) Optimal realization of f 3 4 x x x x 1 2 1 2 x x x x 3 4 00 01 11 10 3 4 00 01 11 10 00 00 01 1 1 1 01 1 1 1 11 1 1 1 11 1 1 1 10 1 10 1 (c) Optimal realization of f and f together 3 4 [ Figure 2.65 from the textbook ]
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Individual vs Joint Optimization
x x x x 1 2 1 2 x x x x 3 4 00 01 11 10 3 4 00 01 11 10 00 00 01 1 1 1 01 1 1 1 11 1 1 1 11 1 1 1 10 1 10 1 (c) Optimal realization of f and f together 3 4 f 3 4 x 1 2 (d) Combined circuit for and [ Figure 2.65 from the textbook ]
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Individual vs Joint Optimization
x x x x 1 2 1 2 x x x x 3 4 00 01 11 10 3 4 00 01 11 10 00 00 01 1 1 1 01 1 1 1 11 1 1 1 11 1 1 1 10 1 10 1 (c) Optimal realization of f and f together 3 4 f 3 4 x 1 2 (d) Combined circuit for and [ Figure 2.65 from the textbook ]
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Individual vs Joint Optimization
x x x x 1 2 1 2 x x x x 3 4 00 01 11 10 3 4 00 01 11 10 00 00 01 1 1 1 01 1 1 1 11 1 1 1 11 1 1 1 10 1 10 1 (c) Optimal realization of f and f together 3 4 f 3 4 x 1 2 (d) Combined circuit for and [ Figure 2.65 from the textbook ]
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Questions?
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THE END
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