1. Data Dependence Distances
The following table shows instruction pair hazard interaction
Write to register file
Data Available Normal/Earliest stage
Instruction class
alu
load
ladr
brl
6/4
6/5
6/2
2/3
4/1
4/2
store(rb)
store(ra)
2/4
branch
2/2
4/3
Data Available Normal/Earliest stage
Read from register file
Normal/forwarded
No hazard

2. Review

3. CS501 Advanced Computer Architecture
Lecture21
Dr.Noor Muhammad Sheikh

4. SRC hazard correction:data forwarding
The hazard detection is required between stage 3-4, and between stage 3-5
The testing and forwarding circuit employ wider IRs to store the data required in later stages

5. add r1, r2, r3
add r2, r3, r4
nop avoided
Faster execution

6. Example Execution time= ET=IC x CPI x T
% speedup= (ET without P-ET with P)/ ET with P x 100
Let ET without P=5
And ET with P=1
Hence % speedup= ((5-1)/1)x100
= 400%
If we assume ET with P=1.25 due to pipeline stalls,
then % speedup= ((5-1.25)/1.25)x100
= 375%

7. RTL for data forwarding
Hazard detection
Data forwarding
dependence
RTL
Stage 3-5
alu5&alu3:((ra5=rb3):XZ5,
(ra5=rc3)&!imm3: Y  Z5);
Stage 3-4
alu4&alu3:((ra4=rb3):XZ4,
(ra4=rc3)&!imm3: Y  Z4);

8. Data forwarding hardware
Instruction Fetch
IR2
PC2
Decode and Operand Read
IR3 X3 Y3
MD3
Mp7
MUX
MUX
Mp6
ALU Operation
ALU
IR4 Z4
MD4
Memory Access
Hazard
Det/forward
unit Z5
IR5
Hazard
Det/forward
unit
Register Writeback

9. Difference between Pipelining and Instruction-Level Parallelism
Single functional unit
Multiple functional units
Instructions issued sequentially
Instructions issued in parallel
Overlapping of instructions
Parallel execution of instructions
Very little extra hardware required
Multiple functional units within the cpu are required

10. Instruction-Level Parallelism
Superscalar Architecture
issues multiple instruction simultaneously
VLIW Architecture
based on a very long instruction
word.

11. Superscalar Architecture
It has one or more IUs (integer units) , FPUs (floating point units), BPUs (branch prediction units)
It divides instructions into three classes
Integer
Floating point
Branch prediction