1. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 1

2. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 1

3. Self-introduction Name Jiang Weikai Tutor Zhang Min
Job Functions / Responsibilities
Charge pump design
Educational Background ( Major in)
Shandong University 山东大学 microelectronics
Past Experience & Expertise
Cadence H-spice C language
Temperature sensor LDO
Work related
Analog circuit design
Hobbies
All kinds of sports listen to music read books 3

4. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 1

5. Background NPI Product: SSD1627
Foundry / Technology: UMC L V/40V, 2P3M
Circuit Block: Built-in Cap V0 Charge Pump
Design Specification
Input VCI = 3V (Range of 2.4V ~ 3.6V)
Output V0 = 15V
Output current = 150uA
Output Ripple < 100mVpp. 5

6. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 1

7. Structure Eliminate threshold voltage drop and reverse current
二．CPB结构
Structure
Eliminate threshold voltage drop and reverse current
从电容
从MOS
主MOS
主电容
Auxiliary MOS --Reduce the parasitic BJT leakage current 7

8. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 8

9. Design procedure
1.主电容值:确定输出驱动电流,电压Vout,时钟频率f,计算每级电压损失V,由计算主电容值。 2.主MOS宽长比：保证充放电完全，4.6RCT/2成立，可得主MOS电阻值，由R= 计算W/L。 3.从电容值：为保证从电容上电压能跟随时钟电压变化，其电容值相比寄生电容值要比较大，10倍以上。 4.从MOS宽长比：当- = 2VDD，为保证主MOS截止，反向漏电流很小，从MOS电容充电时间越小越好，因此RC应尽量小，确定R值，计算W/L。 9

10. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 10

11. Simulation data 11 Dickson_8stage f=1.43MHz C=150pF mp=11 mb Iin(mA)
Iout(uA)
Efficiency(%) 3
-2.293
259
56.5 4
-2.359
264.6
56.1 5
-2.395
266
55.5
Dickson_8stage f=1.25MHz C=187.5pF
-2.281
261.8
57.4
-2.338
266.7 57
mp=12
-2.349
268.5
57.2
-2.404
273
56.8
Technology
UMC 3.3V - 40V
Settling time
7.16ms 15V
Output Ripple
4mV, close loop
Efficiency
Vout = 15V, VCI = 3V, Iin = 2.281mA, IL = 261.8uA, eff. = 57.4%
chip area
reduce one 200-pF build-in capacitor; rise operation frequency(1.25M)
reduce 17% area 11

12. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 12

13. Question & Improvement
1. improve gate-drive, may use 2X clock amplitude (CK,CKB) to control power transistor Mp or improve the nonoverlapping time between CK and CLKB.
2. avoid body current of power transistor Mp to improve output current 13

14. Project-Dickson charge pump
Outline
Self-introduction
Project-Dickson charge pump
Background
Structure
Design procedure
Simulation data
Question & Improvement
Design method 14

15. Design thought Dickson Charge Pump Charge pump Clock LDO module
Logic circuit
oscillator
Four phase clock
Error amp
Power tube
Ref
Top to bottom
Modular design
Debug & improve 15

16. Thanks! 16