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DDR SDRAM The Memory of Choice for Mobile Computing

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Presentation on theme: "DDR SDRAM The Memory of Choice for Mobile Computing"— Presentation transcript:

1 DDR SDRAM The Memory of Choice for Mobile Computing
Bill Gervasi Technology Analyst, Transmeta Corporation Chairman, JEDEC Memory Parametrics Introduction This presentation describes Double Data Rate (DDR) SDRAMs in terms of the effort required to migrate from existing Single Data Rate (SDR) designs and take advantage of the increased performance of a DDR SDRAM.

2 Topics to Cover Market Segments & Fragments
Mobile Design Architectures DDR and SDR Power Analysis DDR SO-DIMM Details There are two primary classes of designs: main memory like PCs and servers, and also small embedded systems like handheld devices and routers. DDR addresses both markets with the same parts but rated differently for the two market application types. Explore similarities and differences between SDR and DDR and the impact to designers. Timing diagrams highlight the new features of DDR and explain how these changes improve the performance without sacrificing the design investments made in older SDR controller technologies. From the systems perspective, what factors must a designer face in terms of pinouts, module sizes, etc? Rather than ignore the most obvious alternative technology, Direct Rambus, contrast DDR to Rambus and show why DDR is clearly the technically superior solution.

3 Segments & Fragments Servers Workstations PC Segment 2 PC Segment 1
Mobile Graphics PC100 PC133 DDR PC100 PC133 DDR Rambus PC100 DDR PC100 PC133 DDR PC100 PC133 DDR PC66 PC100 DDR PC133 DDR (x16 and x32) SS167 2H99 1H00 2H00 1H01 2H01

4 Simple, incremental steps
RAM Evolution 3200MB/s Mainstream Memories DDR II 2100MB/s DDR 1000MB/s SDR 400MB/s Simple, incremental steps The industry standards roadmap for main memories, shown by megabytes per second on a 64bit module. Each step of the way designers have been able to leverage the lessons from the previous generation when using the next. Also in each case, a single controller has been able to support at least two generations simultaneously. DDR is the latest member of this continuum providing a doubling of peak performance of SDR, and the roadmap continues into the future with DDR II, providing 3.2GB/s with a 400MHz clock. DDR II will be an easy migration from DDR I designs. 320MB/s EDO FP

5 Mobile Designs Two Sockets, T-stub 133MHz clock (for now)
Memory Controller Two Sockets, T-stub 133MHz clock (for now) 2.1GB/s transfer (for now) Applications can be categorized in two major divisions: large main memory systems and smaller, point-to-point systems. Main memory systems typically support up to 4 slots operating at clock rates up to 133MHz, which is 266MT/s per data bit, or 2100MB/s with a 64bit module. In these systems, termination resistors are needed to minimize the voltage swings for high performance. Small systems are typically slotless, with the memories connected directly to the controller. With light loads on the order of 15pF per data bit, these systems can run much faster with 200MHz clocks, which is 400MT/s per data bit, or 3.2GB/s on a 64bit bus. In this environment, the termination resistors are not needed and the signals can be run at full rail to rail levels.

6 Butterfly SO-DIMMs Perfect for notebook
Motherboard SO-DIMM SOCKET CPU CPU NB SO-DIMM SOCKET Perfect for notebook Especially thin & light! Single access door to both SO-DIMMs Internet Appliance: 1 or 2 SO-DIMMs

7 Mobile Market Requirements
Low power, low heat Long battery life Small form factor End-user upgrade

8 Power = CV2f% Keys to mobile Factors: design: Capacitance (C)
Reduce C and V Match f to demand Minimize duty cycle Utilize power states Factors: Capacitance (C) Voltage (V) Frequency (f) Duty cycle (%) Power states

9 Power: Capacitance DDR capacitance 20% less than SDR
Voltage Frequency Duty cycle Power states DDR capacitance 20% less than SDR Tight circuit board design Low parasitic sockets

10 Lower Voltage means Lower Power
Power: DDR vs SDR Capacitance Voltage Frequency Duty cycle Power states Lower Voltage means Lower Power PC133 (3.3V) 2.0X PC100 (3.3V) 1.2X PC266 (2.5V) 1.0X

11 Double the Bandwidth yet Lower Power
Power: DDR vs SDR Capacitance Voltage Frequency Duty cycle Power states Double the Bandwidth yet Lower Power PC266 1.0X PC100 .31X PC133 .25X

12 Power: Frequency Memory speed to match task demand
Capacitance Voltage Frequency Duty cycle Power states Memory speed to match task demand Adjust memory clock for lowest power Stream back to back operations on open bank, then close DDR burst efficiency really shines

13 Power: Duty Cycle Caches minimize memory demands
Capacitance Voltage Frequency Duty cycle Power states Caches minimize memory demands DDR cuts burst time in half Get back into low power state sooner

14 Long Battery Life Lowest power to perform a task
Desktop performance expected Battery extending technologies: SpeedStepTM LongRunTM SpeedStep and LongRun are trademarks of Intel Corporation and Transmeta Corporation, respectively

15 Introducing LongRunTM
Capacitance Voltage Frequency Duty cycle Power states SpeedStep LongRun The number 11 is a trademark of Spinal Tap

16 LongRunTM Technology Capacitance Voltage Frequency Duty cycle Power states Smart reprogramming of memory frequency based on demand CPU monitors trends in CPU demand Automatically adjust CPU voltage, CPU & memory frequency as needed Utilize all memory power states Lowest power state possible Close banks between bursts LongRun is a trademark of Transmeta Corporation

17 LongRunTM Advantage Capacitance Voltage Frequency Duty cycle
Power states

18 Mobile Market Requirements
Long battery life Low power, low heat Small form factor End-user upgrade

19 End User Upgrade DDR SO-DIMM Status
63.6 x 31.75mm 200 pins on .60mm centers, staggered x64 and x72 (ECC) supported JEDEC specification votes being counted Multiple mobile designs in progress Samples in test now, production 1Q01 Also great for small (Flex ATX) desktop

20 Conclusions DDR Memory of choice for the future
Enables mobile computing Low power yields long battery life Small form factor end-user upgrades Smart power management schemes

21 Summary DDR is here today Industry Standards
Double the bandwidth at lower power Evolutionary design change over SDR Applies to all market segments Industry Standards Detailed complete data sheet & models Module designs on the web Visit DDR is a successful evolution of the industry standard memory product roadmap. It doubles the available bandwidth while retaining most of the infrastructure of SDR designs. It is technically superior to Direct Rambus in terms of cost, performance, and power. The standards documents are in place and available for free on the JEDEC web site.

22 Thank You

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