1. Design for Simple Spiking Neuron Model
Mixed-Signal Circuit
Design for Simple Spiking Neuron Model
Abdullah H. Ozcan
Vamshi Chatla
ECE 6332 – Fall 2009 University of Virginia

2. Motivation - 10^11 neurons, each neuron 10-10^5 synapses
- Uses less power than your refrigerator light
- Power matters; decreasing energy/spike

3. Outline
- ADC Circuit
- Neuron Circuit
- Conclusion

4. TIQ Based
ANALOG TO DIGITAL CONVERTER

6. Comparator Stage

7. Gain Booster Stage Sharper Transitions in the output
Full voltage swing 7

8. XOR Stage
- Converts TC Code to 1 out of N code

9. Encoder Stage (Fat Tree)

10. Simulation Results

16. Lowering Supply Voltage

17. ADC results without gain booster stage

18. ADC results using gain booster stage

19. - Technology: 0.6 um - Avg Power: 14.2 mW (14.0 mW)
ADC (4bit) Summary
- Technology: 0.6 um
- Avg Power: mW (14.0 mW)
- Max Power: mW
- Transistors used: 360
- Supply Voltage: 5 V
Analog Range: 1 V
Sampling Rate: 200 MHz
6bit ADC
6 bit ADC (TIQ)
(Fat Tree Encoder)
(ROM Encoder)
Technology
0.6 um
0.18 um
0.25 um
Max Speed
0.2 GSPS
2.00 GSPS
1.11 GSPS
Power Consumption
Avg 380 mW
Avg. 22 mW
Max mW
Avg mW
Max mW
Transistor Count -
485
2803

20. Izhikevich’s Simple Spiking Neuron Model

21. VLSI Circuit of Izhikevich’s Model
(Jayawan H. B. Wijekon, Piotr Dudek (2007). Spiking and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit, Int. Joint Conference on Neural Networks)

22. VLSI Circuit (0.35 μm0.6 μm)

23. Comparator Part

24. Matlab Results

25. Circuit Results

26. Neuron Circuit Summary
-Transistors used: 12
mW  mW (% 17 )

27. QUESTIONS
Thank You!