1. RECONFIGURABLE NETWORK ON CHIP ARCHITECTURE FOR AEROSPACE APPLICATIONS
SUMIT KANDPAL
TOSIRON ADEGBIJA

2. NETWORK ON CHIP(NOC)
Collection of computation resources connected through a network inside a chip
Communication through the packets
Communication architecture consists of interconnected switches each connected to a resource
Communication unit
Network Interface(NI)
NI transforms bits from computation resources into packets
Switches

3. FUNCTIONAL UNITS Each unit consists of: Processing Unit Local Memory
IP Blocks(sensors, analog to digital converters(ADC))

4. NETWORK ON CHIP(NOC)

5. SWITCHING Switching is used to route packets over the network.
Wormhole switching is used in NOC
Three different types of switching
Deterministic
Adaptive
Hybrid

6. FAULT TOLERENCE AND REDUNDANCY
Fault tolerance: Technique that enables the system to maintain expected service despite presence of hardware faults.
Redundancy
Affect the performance
Increases the application cost
Balanced tradeoff between performance and level of tolerance

7. FAULT TOLERANCE IN NOC USING REDUNDANCY
Segmentation of the communication and computational infrastructure
Information may be prioritized based on attention needed by the network
Different coding technique for parity check
Packet encoding and redundant transmission of information.
Inserting extra links and wires would tolerate manufacturing faults

8. AIRCRAFT PARTS AIRCRAFT PARTS Control system Cockpit Black box Wings
Engine
Gears and fuel tank
Tail, elevator and rudder
Fuselage

9. AIRCRAFT PARTS

10. NETWORK TOPOLOGIES
Defines the placements and interconnections of nodes inside the NOC area
Determines the bandwidth and latency of the network
Most Common Topologies
2D Mesh topology
Torus topology
Application specific topology: Topic of this paper

11. NETWORK TOPOLOGIES

12. FIXED TOPOLOGY A fixed 2D Mesh topology
Parts with similar traffic pattern and function are close to each other
Reduces network overhead and hop count
Disadvantages
Delays incurred by routing paths

13. FIXED TOPOLOGY

14. APPLICATION SPECIFIC ARCHITECTURE
STAR network topology
Cockpit switch(central unit) directly connected to all units
Advantage
Decreases hop count and increases bandwidth
Disadvantage
Low fault tolerance due to link failure and switch crash
Solution
Reconfigure the topology

15. APPLICATION SPECIFIC ARCHITECTURE

16. RECONFIGURE THE TOPOLOGY
System can modify and switch into ring topology.
Fault is detected over star network
Link is jammed due to traffic and shortage of bandwidth
Direct link if the source and destination are adjacent
Central switch malfunctions

17. ERRIC PROCESSOR Basic Elements
Control Unit: Decode and fetch the next instruction.
Register Units: Used to keep data.
AU and LU : Execute arithmetic and logic functions
Extra Hardware: Check Inputs and recovers from detected faults.

18. ERRIC PROCESSOR
32 bit architecture and is able to fetch 2 instructions every cycle.
Instruction set is designed malfunction tolerant
Extra hardware blocks checks input and recovers from any detected faults
Error recovery is activated only when a fault has been detected

19. ERRIC PROCESSOR

20. ERIC PROTOTYPE OF FPGA HARDWARE

21. CONCLUSION
Introduction of fault tolerant NOC system for the control of aircraft parts
Implementing redundancy in the topology of the NOC.
Processing units are based on ERRIC
Network topology is controlled by embedded reconfigurable architecture