1. “Definition” of Combinational
Assign initial value of to all internal wires.
Update gate outputs (i.e., change ) in any order.
For each set of input values : 1 / ^® ^
Circuit is combinational iff values disappear from all wires for every set of input values.
Strong Definition: ^
Circuit is combinational iff values disappear from all output wires for every set of input values.
Weaker Definition: ^

2. Controlling Values ? 1 1 a “controlling” input 1 1 ?
AND ? 1
AND
a “controlling” input 1 1 1
AND ?
full set of “non-controlling” inputs ?
Recall that 0 is a controlling value for an AND gate. <click> If a single input is 0, the gate produces an output of 0 regardless of the other inputs.
<click> Of course, given the full set of inputs, we know the output.
<click> But given a strict subset of non-controlling input values, we do not know the output.
Here ? is unknown value or possible indeterminate value. (It could be a voltage value between logical 0 and logical 1).
In analogous way, 1 is a controlling value for an OR gate. For more complex gates, we may have combinations of input values that are “controlling”.
unknown/undefined output

3. Analysis
Functional analysis: determine if the circuit is combinational and if so, what values appear.
Timing analysis: determine when the values appear.
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.

4. Analysis Explicit analysis: 01 02 01 02 01 02 arrival times
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 02 01 02 01 02
arrival times
Assume gates each have unit delay.

5. Analysis Explicit analysis: 1 1 01 01 02 11 01 01 02 02 03 01 02 041 1
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 01 02 11 01 01 02 02 03 01 02 04

6. Analysis Þ Explicit analysis: 1 1 01 11 01 02 03 04 n inputs1 1
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 11 01 02 03 04
n inputs Þ
combinations
Exhaustive evaluation intractable.

7. Cyclic Combinational Circuits
Example: 1 z 2 3 a b c Ù Ú
Not combinational.

8. Cyclic Combinational Circuits
Example: 1 1 Ù Ú Ù 1 z 2 z 3 z
Not combinational.

9. Cyclic Combinational Circuits
Example:
5.0
0.1
4.9
0.1
0.0 Ù Ú Ù
0.2 1 z 2 z 3 z
Logical “1”: ≈ 5 volts
Logical “0”: ≈ 0 volts

10. Cyclic Combinational Circuits
Example:
5.0
0.1
4.9
0.1
0.0 Ù Ú Ù
0.1 1 z 2 z 3 z
Logical “1”: ≈ 5 volts
Logical “0”: ≈ 0 volts

11. Cyclic Combinational Circuits
Example:
5.0
0.1
4.9
5.0
4.8 Ù Ú Ù
4.8 1 z 2 z 3 z
Logical “1”: ≈ 5 volts
Logical “0”: ≈ 0 volts

12. Cyclic Combinational Circuits
Example:
5.0
0.1
4.9
5.0
4.8 Ù Ú Ù
4.9 1 z 2 z 3 z
Logical “1”: ≈ 5 volts
Logical “0”: ≈ 0 volts

13. Cyclic Combinational Circuits
Example:
5.0
0.1
4.9 ? ? ? Ù Ú Ù
2.7 1 z 2 z 3 z
Logical “1”: ≈ 5 volts
Logical “0”: ≈ 0 volts

14. Cyclic Combinational Circuits
Example: 1 z 2 3 a b c Ù Ú
Not combinational.

15. Cyclic Combinational Circuits
Example: 1 1 1 Ù Ú Ù 1 1 z 2 z 3 z
Not combinational.

16. Cyclic Combinational Circuits
Example: 1 1 1 Ù Ú Ù 1 z 2 z 3 z
Not combinational.

17. Cyclic Combinational Circuits
Example: 1 1 1 1 Ù Ú Ù 1 z 2 z 3 z
Not combinational.

18. Cyclic Combinational Circuits
Example: 1 1 1 Ù Ú Ù 1 z 2 z 3 z
Not combinational.

19. Cyclic Combinational Circuits
Example: 1 1 1 Ù Ú Ù 1 1 z 2 z 3 z
Not combinational.
(oscillates!)

20. Ternary-Valued Analysis
Let wires assume values in { , 0, 1}.
stands for unknown/indeterminate. 1 z 2 3 Ù Ú
2.7

21. Ternary-Valued Analysis
Let wires assume values in { , 0, 1}.
stands for unknown/indeterminate. 1 z 2 3 Ù Ú

22. Ternary-Valued Analysis
AND gate: 1 x 2 G Ù 1 x ) , ( 2 G 1

23. Ternary-Valued Analysis
OR gate: 1 x 2 G Ú 1 x 2 x ) , ( 2 1 x G 1 1 1 1 1 1 1 1 1 1 1

24. Ternary-Valued Analysis
NOT gate: x G 1 x ( x) G 1

25. Ternary-Valued Analysis
XOR gate: 1 x 2 G + 1 x ) , ( 2 G 1 1

26. Ternary-valued Logic
In addition to {0, 1} allow a value for unknown/indeterminate.
Gate properties: 1
1) not a pivotal input

27. Ternary-valued Logic
In addition to {0, 1} allow a value for unknown/indeterminate.
Gate properties: 1 1 1 1 1 1
1) not a pivotal input
2) an unknown output 1

28. Analysis of Cyclic Circuits
Example
Assign initial value of to all internal wires in circuit.

29. Analysis of Cyclic Circuits
Example
For specific input values, compute gate outputs.

30. Analysis of Cyclic Circuits
Example 1 1 1
For specific input values, compute gate outputs.

31. Analysis of Cyclic Circuits
Example 1 1 1 1
For specific input values, compute gate outputs.

32. Analysis of Cyclic Circuits
Example 1 1 1 1 1
For specific input values, compute gate outputs.

33. Analysis of Cyclic Circuits
Example 1 1 1 1 1 1
For specific input values, compute gate outputs.

34. Analysis of Cyclic Circuits
Example 1 1 1 1 1 1 1
For specific input values, compute gate outputs.

35. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order.

36. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1

37. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1

38. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1 1

39. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order.
Circuit is combinational iff all values disappear.
Claim: 1 1
output cannot change 1

40. Analysis of Cyclic Circuits
Example:

41. Analysis of Cyclic Circuits
Example:

42. Analysis of Cyclic Circuits
Example:

43. Analysis of Cyclic Circuits
Example:

44. Analysis of Cyclic Circuits
Example:

45. Analysis of Cyclic Circuits
Example: 1

46. Analysis of Cyclic Circuits
Example: 1 1

47. Analysis of Cyclic Circuits
Example: 1 1 1
Combinational.

48. Analysis of Cyclic Circuits
Example:

49. Analysis of Cyclic Circuits
Example:
Not combinational.

50. Related Work
Malik (1994), Hsu, Sun and Du (1998), and Edwards (2003) considered analysis techniques for cyclic circuits.
Their approach: identify equivalent acyclic circuits.
inputs
outputs
cyclic
circuit
acyclic
circuit
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper.
minimum-cut feedback set
Unravelling cyclic circuits this way is a difficult task.

51. Our Approach Perform event propagation, directly on a cyclic circuit.10 00 16
inputs 10
outputs
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper. 13 10 00

52. Our Approach Perform event propagation, directly on a cyclic circuit.
Compute events symbolically, with BDDs.
[x]0
[a]0
cyclic
circuit
f1=[b(a+x(c+d))]6
[b]0
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper.
f2=[d+c(x+ba))]6
[c]0
[d]0

53. Analysis of Cyclic Circuits
Example 1 1 1 1 1 1
For specific input values, compute gate outputs.

54. Analysis of Cyclic Circuits
Example 1 1 1 1 1 1 1
For specific input values, compute gate outputs.

55. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order.

56. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1

57. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1

58. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order. 1 1

59. Analysis of Cyclic Circuits
For each set of input values :
Assign initial value of to all internal wires.
Update gate outputs in any order.
Circuit is combinational iff all values disappear.
Claim: 1 1
output cannot change 1

60. Analysis of Cyclic Circuits
Example:

61. Analysis of Cyclic Circuits
Example:

62. Analysis of Cyclic Circuits
Example:

63. Analysis of Cyclic Circuits
Example:

64. Analysis of Cyclic Circuits
Example:

65. Analysis of Cyclic Circuits
Example: 1

66. Analysis of Cyclic Circuits
Example: 1 1

67. Analysis of Cyclic Circuits
Example: 1 1 1
Combinational.

68. Analysis of Cyclic Circuits
Example:

69. Analysis of Cyclic Circuits
Example:
Not combinational.

70. Related Work
Malik (1994), Hsu, Sun and Du (1998), and Edwards (2003) considered analysis techniques for cyclic circuits.
Their approach: identify equivalent acyclic circuits.
inputs
outputs
cyclic
circuit
acyclic
circuit
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper.
minimum-cut feedback set
Unravelling cyclic circuits this way is a difficult task.

71. Our Approach Perform event propagation, directly on a cyclic circuit.10 00 16
inputs 10
outputs
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper. 13 10 00

72. Our Approach Perform event propagation, directly on a cyclic circuit.
Compute events symbolically, with BDDs.
[x]0
[a]0
cyclic
circuit
f1=[b(a+x(c+d))]6
[b]0
Transition: Thrust of our work is to show that cyclic combinational circuits are not a theoretical curiosity.
Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
See DAC paper.
f2=[d+c(x+ba))]6
[c]0
[d]0

73. Analysis
Functional analysis: determine if the circuit is combinational and if so, what values appear.
Timing analysis: determine when the values appear.
Contributions:
Symbolic algorithm based on Binary Decision Diagrams.
Optimizations based on topology (“first-cut” method).
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.

74. Analysis Explicit analysis: 01 02 01 02 01 02 arrival times
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 02 01 02 01 02
arrival times
Assume gates each have unit delay.

75. Analysis Explicit analysis: 1 1 01 01 02 11 01 01 02 02 03 01 02 041 1
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 01 02 11 01 01 02 02 03 01 02 04

76. Analysis Þ Explicit analysis: 1 1 01 11 01 02 03 04 n inputs1 1
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 11 01 02 03 04
n inputs Þ
combinations
Exhaustive evaluation intractable.

77. Analysis Symbolic analysis: 01 : 12 : similarly for 03 : 14 :
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 01 : 12 :
similarly for 03 : 14 :

78. Analysis Symbolic analysis: 01 evaluates to 0 02 11 evaluates to 1 12
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations. 12
undefined

79. Analysis Symbolic analysis: 01-7 evaluates to 0 08-28 11-10
Transition: more than a theoretical curiosity, not a nuisance but an important optimization.
Conviction: Most circuits can be optimized with cycles.
General methodology.
Significant optimizations.
111-21
undefined
range of values

80. Fixed-Point Theorem Let wires assume values in { , 0, 1}.
stands for unknown/indeterminate.
Define a partial ordering,
and 1
Extend ordering to state vectors, co-ordinate-wise:
for and , ] , [ 1 n y Y K = x X
iff i n x 1 =
" y X Y

81. Fixed-Point Theorem State Space (Lattice) 1 [ , , ] ^
[ , , ] ^ 1
Finite. Only make changes.

82. Fixed-Point Theorem
Reacheable States
(example)
[ , , ] ^ 1

83. Fixed-Point Theorem Reacheable States (example) [ , , ] 1 [ , , ]
[ , , ] 1
[ , , ]
[ , , ] 1 ^ ^
[ , , ] ^ 1
[ , , ] ^ ^
[ , , ] ^ 1 ^
[ , , ] ^ ^
[ , , ] ^ ^ ^

84. Fixed-Point Theorem Define the join of and
as the lowest point above both. ] , [ 1 n y Y K = x X
Claim: If X and Y are reacheable, then their join is reacheable.
Assert: Final state is same regardless of order of updates
(so-called “fixed-point”).