1. Thermal behavior of the LHCb PS VFE Board
TS/CV/DC CFD Team
74 mm
Thermal behavior of the LHCb PS VFE Board
Vaclav Vins

2. THE PROBLEM
This project is focused on CFD study of small electronics device cooling.
PS VFE Board installed at PS part of LHCb Detector consists of three main layers. 16 chips which should be cooled down are installed on bottom side of the second (middle) layer.
Two kinds of cooling have been considered in this study:
Dry air cooling
Water cooling
Technical parameters:
Heat power in one PS Board … 8 W (0,5 W/chip)
Maximum temperature of the chip surface … + 50 C
PS VFE Board
Vaclav Vins

3. AIR COOLING – MAIN PARAMETERS
PRIMARY SOLVED PARAMETERS:
Necessary minimum mass flow rate of the cooling air
Optimize position and main dimensions of the air-flow inlets
SOLUTION ASSUMPTIONS:
Steady state case (time independent) was solved.
Turbulent flow with high Reynolds number was put into account.
Material of the chips was modeled as pure silicon.
Produced heat was considered as surface heat source at circuitry area of the die.
All walls except chip active surfaces were assumed as adiabatic.
Scheme of the air-cooling layout
Vaclav Vins

4. Generated mesh of the problem with tetrahedral cells
AIR COOLING - CFD MODEL
MESH:
Geometry of the problem was defined and simplified on the base of CATIA technical drawing.
Only the volume area between first and second layer of PS VFE Board and the outlet region was modeled.
Assumed number of the cells … around
Generated mesh of the problem with tetrahedral cells
Vaclav Vins

5. AIR COOLING - RESULTS
During this study the air-cooling solution was found as more expensive and less effective compared to water cooling.
The CFD study of PS Board air-cooling was stopped at this level.
Cross section of the model with temperature field on the chip free surfaces (m = 0,7 g/s)
NOTE:
Implementation of the middle (second) layer of PS Board in the model would be following possible improvement of the model (heat conduction and better convection).
Cross section of the model with velocity field of cooling air (m = 0,7 g/s)
Vaclav Vins

6. WATER COOLING – MAIN PARAMETERS
PROBLEM DEFINITION:
In this case the PS Board will be cooled with water of temperature around + 20oC.
Metal block (most likely aluminum one) attached to distributing pipes should remove the heat produced by chips by thermal conduction. All generated heat will be afterwards took away from relevant area with forced convection of cooling water.
Effectiveness of the heat transfer between metal block and the chips will be improved by special foil of thermally conductive interface material.
SOLUTION ASSUMPTIONS:
Heat produced by each chip is modeled as a surface heat source in the circuitry area of the die.
Material of the chips is again modeled as pure silicon.
The 100% effective conduction process is assumed between all relevant materials.
Water cooling is simulated just by known temperature and heat transfer coefficient at the wall of metal block (calculated from Nusselt criteria for forced convection of turbulent water flow).
Vaclav Vins

7. WATER COOLING – CFD MODEL
According to quite bad dimension ratio (app. 100 x 100 x 8 mm) and relatively good symmetry of solved area the model was simplified. Only one half of the area between the first and the second layer of PS Board was modeled. Generated mesh consists of app. 350 000 hexahedral cells.
Photo of the second PS Board layer
Generated mesh with assumed boundary conditions
Vaclav Vins

8. WATER COOLING – RESULTS
The surface temperature of the chips did not reach limit value 50oC. The region under the chips of the second green layer was heated up on 42oC. The maximum metal block surface temperature was around 35oC.
Temperature field on the green layer free surface
Temperature field in the cross section area led on the chip upper surfaces
Vaclav Vins