1. Embedded System Development Lecture 7 2/21/2007
CS590
Embedded System Development
Lecture 7 2/21/2007

2. Class Notes
Should we postpone the Course Project Mid-Term Document and Presentation for a week due to the snow day?
2/3-Term Exam will be March 28th.

3. Microprocessor Architecture
Assembly language is the human-readable form of the instructions that the microprocessor really knows how to do.
A program called an assembler translates the assembly language into the binary instructions that the microprocessor executes.

4. Microprocessor Architecture
Each assembly-language instruction turns into just one instruction for the microprocessor.
Depending on the microprocessor, the may all be the same size or may vary in size.
Every family of microprocessors has a different assembly language, because each understands a different set of instructions.

5. Microprocessor Architecture
Within a given family of microprocessors, the assembly languages for the individual microprocessors usually are almost identical to one another.
When the compiler translates C, most statements become multiple instructions for the microprocessor to execute.

6. Microprocessor Architecture
Most C compilers will produce a listing file that shows the assembly language instructions generated from the C code.

7. Microprocessor Architecture
The typical microprocessor has within it a set of registers, sometimes called general-purpose registers, each of which can hold a value the processor is working with.
Access to these registers is very fast compared to accessing memory.

8. Microprocessor Architecture
The number of registers available varies with the processor.
Obviously, having more registers makes the processor more powerful but also increases its complexity.

9. Microprocessor Architecture
In addition to the general-purpose registers, most microprocessors have several special registers.
Every microprocessor has a program counter, which keeps track of the next instruction that the microprocessor is to execute.

10. Microprocessor Architecture
Most microprocessors have a stack pointer, which stores the memory address of the top of the general purpose microprocessor stack.
You can PUSH data on the stack and POP data off it.

11. Microprocessor Architecture
Some common processor instructions
Move
Arithmetic instructions (Some processors can only do these in a special register)
Jump
Conditional jump
Call
Return

12. Microprocessor Architecture
C and Assembly Language
x = y + 133;
MOVE R1, (y)
ADD R1, 133
MOVE (x), R1

13. Interrupt Basics Interrupts start with a signal from the hardware.
This signal ultimately attaches to an input pin on the microprocessor called an interrupt request, or IRQ, that lets the microprocessor know that some other chip in the circuit wants help.

14. Interrupt Basics
Microprocessors will have one or usually more interrupt inputs.
When the microprocessor detects that a signal attached to one of its interrupt request pins is asserted, it stops executing the sequence of instructions it was executing, saves on the stack the address of the instruction that would have been executed next and jumps to an interrupt routine.

15. Interrupt Basics
An interrupt routine is sometimes called an interrupt handler or an interrupt service routine or ISR.
The last instruction to be executed in an interrupt routine is an assembly language RETURN instruction.
On some microprocessors, e.g. Intel x86 family, they have a special ‘return from interrupt routine’ instruction.

16. Saving and Restoring the Context
When execution returns from the ISR, the registers must be in the same state as they were before the interrupt.
Pushing all the registers at the beginning of an interrupt routine is known as saving the context.
Popping them at the end is known as restoring the context.

17. Disabling Interrupts
Almost every system allows you to disable interrupts, usually in a variety of ways.
Masking
Priority
Nonmaskable interrupt – usually used to handle power fail or other catastrophic event.

18. Some Common Questions
How does the microprocessor know where to find the interrupt routine when the interrupt occurs?
How do microprocessors that use an interrupt vector table know where the table is?
Can a microprocessor be interrupted in the middle of an instruction?

19. Some Common Questions
If two interrupts happen at the same time, which interrupt routine does the microprocessor do first?
Can an interrupt request signal interrupt another interrupt routine?
What happens if an interrupt is signaled while the interrupts are disabled?

20. Some Common Questions
What happens if I disable interrupts and then forget to reenable them?
What happens if I disable interrupts when they are already disabled or enable them while they are already enabled?
Are interrupts enabled or disabled when the microprocessor first starts up?
Can I write my interrupt routine in C?

21. The Shared-Data Problem
The Shared-Data Problem occurs when an interrupt service routine needs to access the same data as the rest of your code.
These types of bugs can be extremely hard to find.

22. Atomic and Critical Section
A part of a program is said to be atomic if it cannot be interrupted.
A more precise way to look at the shared-data problem is that it is the problem that arises when an interrupt routine and the task code share data, and the task code uses the shared data in a way that is not atomic.
A set of instructions that must be atomic for the system to work properly is often called a critical section.

23. Solutions to the Shared-Data Problem
Disable interrupts
Implement a software solution

24. The volatile Keyword
Most compilers assume that a value stays in memory unless the program changes it, and they use that assumption for optimization.
The volatile keyword, part of the C standard, allows you to warn your compiler that certain variables may change because of interrupt routines or other things the compiler doesn’t know about.

25. Interrupt Latency
The interrupt latency is the amount of time it takes a system to respond to an interrupt.

26. Interrupt Latency Several factors contribute to this:
The longest period of time during which the interrupt is disabled.
The period of time it takes to execute any interrupt routine of higher priority.
How long it takes the processor to stop doing what it’s doing and begin executing the ISR.
How long it takes the ISR to do enough work to accomplish what is needed.

27. Interrupt Latency
To keep your interrupt latency low (and your response good) you should:
Make your interrupt routines short
Disable interrupts for only short periods of time.

28. Class Project
Any questions from last week?

29. Project Team 1
Anne-Marie Buibish
John Mallinger
Anthony Megna

30. Project Team 2
Steve Gardner
Andrew Marcum
Seth Schapiro
Erik Certain

31. Project Team 3 John Bodenschatz Elhadi Elomda Mary Green
Richard Hoffman

32. Project Team 4
Angelyn Begley
Michael Carsten
Keith Shie