1. Outer Endcap External Bus tape
Claudia Gemme, Ettore Ruscino (INFN Genova)
ITk Week – 24 September 2018
Embedded tape
External tape

2. Overview of a serial power electrical services
One serial power chain per each side of the Half Ring:
8 quad modules in the Inner Layer
11 quad modules in the Middle Layer
13 quad modules in the Outer Layer
The new version of the EC bus tape is implemented as an external, inner rim, tape.
So far, the middle half ring tape has been implemented.

3. Middle half ring Top view
DCS/LV
PP0 HV
PP0
On each wing, connection to the module and PSPP chip
For two wings, connection to the DCS/LV and HV PP0 boards are foreseen
The routing of power and NTC lines is done on 5 layers.

4. Normal Wing schematic
Wing routing
Connector to the flex module

5. Special wing to PP0 Cards (LV/DCS and HV) See Graham’s talk for PP0 *
* In this version two NTCs are routed to the LV/DCS PP0, from both modules at the HR edge *

6. Production plans The middle Flex Ring routing is completed.
Optimized on a HR geometry slightly different wrt most recent Layout TF2 (Rint mm)
Two vendors contacted: Phoenix and Eltos that should produce 6 bus tape each.
Now, planning electrical and mechanical tests.
Phoenix Bus Tape:
Dielectric layers will be in Arlon 85N
Full stack vias (from Top to Bottom Layers)
Production launched: prototypes are expected in late October
Eltos Bus tape:
dielectric layers will be in Polymide
Discussion of Layout completed, we hope to submit the production in late September
Full stack vias (from Top to Bottom Layers) only for Serial Power line
Blind vias (From Top to InnerLayer2) for DCS and HV lines
Phoenix
Eltos
Max dimension [mm x mm]
600x350
750x350
Isolation material
Arlon 85N
Polymide
Minimum vias hole/full diameter [um]
150/300
200/800
Vias technique
Full stack
Blind or Full stack
Stack up thickness [um]
650
580
Copper thickness [um]
190
250

7. Bus tape cross section (Phoenix PCB provider)

8. Bus tape cross section (Eltos PCB provider)
Very preliminary layout, received on Friday!
250 um Copper out of 580 total. The 70um on the top level reduces some possible criticalities in the Phoenix option.
Other small difference in Vias dimension
Possible to build large panels where also Outer bus tape can fit.

9. Voltage drop and Total power
Voltage drop has been calculated Hyperlynx on Phoenix bus tape with current of 8A
RTotalBus bus tape on serial Powering = 0,05 Ohm
Expected 3.1 W on the bus tape, ~ 2.6 % of total power delivered to the 11 modules (123.2 W)
Expected to be a bit lower for Eltos design for difference in vias
A larger contribution comes by the connectors:
BM28 connector contact resistance quoted: Rcontact = 0.1 Ω  RLV per connector = 11 mΩ
RTotalConnectors = 0,13 Ω  8.5 W
RTotal = RTotalBus + RTotalConnectors = 0,18 Ohm
Total Power on tape = 11,6 W  9,4 % of total power in the SP chain

10. Conclusions Middle Half ring bus tape design completed
Submitted to Phoenix  expected in October
Technical discussion concluded with Eltos  Hope in a different submission soon
Now preparing to receive them and to perform electrical and mechanical test
In contact with Niklaus for PSPP chip
Chambers to survey tape before and after gluing on half ring in construction in Ge.

11. Spare

12. BM28 connector resistance:
BM28 connector contact resistance :
Rcontact = 0.1 Ω
-> 2 * 18 shorted contact
RLV per connector = 2 (in/out) * 1/(18 / Rcontact )= 11 mΩ
Power drop per connector = 11 e-3 * 8 2
= 0,7 W
Total connectors in the middle FlexRing = 12
Rtotal connectors = 12 * 11mΩ = 0,132 Ω
Total connectors power drop = 8.5 W
Rtotal FlexRing serial Powering = 0,049 Ohm
Rtotal FlexRing+ R total connectors = 0, ,132 = 0,18 Ohm
Total Electrical Power drop = 3,14 + 8,5 = 11,6 W
Half Flex Ring power drop is 9,4 % of total power delivered to the 11 modules (123.2W)

13. NTC PSPP chip NTC0 NTCa HR-flex PSPP chip x NTC0 NTCd HR-flex
There are 2 NTCs per module flex;     -One of them (NTC0) is for the PSPP chip: one line is sent to the PSPP chip, the other  is connected to the module local ground (this will be done at flex module level);       -The other NTC (NTCx and NTCx_RET, x = a,...k) has both terminals on the connector because it will be either connected to  the PSPP for redundancy (in this case I       shorted NTCx_RET with the local ground) or (x= d,e) will be connected to DCS controller  if the module is positioned to the Half Ring edge (in this case is  necessary           to bring NTCx and NTCx_RET directly to DCS End of Stave card --> see P3 and P4).
Local gnd
For example:
It is LV1 for P0
Connector (see
Page 7)
PSPP chip
Flex Module (n)
Temp0
Temp1
NTC0
GNDmod,GNDsup,VSS,GND_A,GND_D
Flex module
connector
HR - flex
connector
NTCa
NTCa_RET
NTCa
HR-flex
PSPP chip
Flex Module (on edge)
Local gnd
For example:
It is LV5 for P4
Connector (see
Page 7)
Temp0
NTC0 x
Temp1
Flex module
connector
GNDmod,GNDsup,VSS,GND_A,GND_D
connector
HR - flex
NTCd
NTCd_RET
NTCd
To DCS controller
HR-flex

14. Connector P0
For flex module
Connector P4 (and P3)
For flex module in the
HR flex edge.