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CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 16 March 14 W’05 Yutao He yutao@cs.ucla.edu 4532B Boelter Hall http://courseweb.seas.ucla.edu/classView.php?term=05W&srs=187154200.

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Presentation on theme: "CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 16 March 14 W’05 Yutao He yutao@cs.ucla.edu 4532B Boelter Hall http://courseweb.seas.ucla.edu/classView.php?term=05W&srs=187154200."— Presentation transcript:

1 CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 16
March 14 W’05 Yutao He 4532B Boelter Hall

2 Outline Administrative Matters Recap
Registers Shift Registers Chapter 11 – Sequential macro modules Counters

3 Administrative Matters
HW# 9 Is posted and will be self-graded Describes how the topics in Ch. 11 and 12 will be tested The Final Is given on Friday A review session will be held on Wednesday Extra office hours will be scheduled My office hours this week Monday and Wednesday 6-7:30pm Thursday 7:30-9pm Graded work

4 Chapter 11 Sequential Modules
Sequential Systems Flip-Flops (D, JK, SR, T FFs, etc.) Chapters 7-8 Design Analysis Module networks (Register, Shift Register, Counter) Chapter 11 Basic Questions: What are each module’s property? inputs, outputs, functions (high-level and binary level) How to implement it using FFs and logic gates? How to design a sequential system using these modules? How to analyze a sequential system using these modules?

5 n-Bit Register

6 Shift Registers Basic Types: Serial In/Serial Out (SI/SO): m=n=1
CLK Shift Register CTL n Basic Types: Serial In/Serial Out (SI/SO): m=n=1 Serial In/Parallel Out (SI/PO): m=1, n> 1 Parallel In/Serial Out (PI/SO): m>1, n=1 Parallel In/Parallel Out (PI/PO): m, n > 1

7 Modulo-p Counter Modulo-p Counter CLK CTL n TC

8 Modulo-p Counter: High-Level Spec

9 Types of Modulo-p Counter
Sequencing direction Up counter Down counter Up/Down counter Number of states or Encoding scheme Binary counter Decimal (a.k.a. Decade) counter non-power-of-2 counter Gray code counter Ways of implementation Ring counter Twisted tail (a.k.a. Johnson, Mobius) counter Ripple counter

10 Types of Modulo-p Counters (Cont’d)
According to numbers and encoding scheme of states: Decimal

11 Types of Modulo-p Counters (Cont’d)
Modulo-4 Ring Counter Modulo-8 Twisted Tail Counter

12 Self-Starting Counter
The problem: Given a counter that does not use all state combinations of the storage elements, how to initialize a counter with a valid state? The concept of self-starting: From any initial state, a counter can eventually enter the valid counter sequence. Example: A modulo-5 counter 111 001 100 110 101 000 010 011 111 001 100 110 101 000 010 011 Self starting Not Self starting

13 Binary Mod-16 Counter with Parallel Input

14 Binary Counter: High-Level Spec

15 Applications of Counters (1)
Count number of occurrence of an event

16 Applications of Counters (2)
Control a fixed sequence of actions

17 Applications of Counters (3)
Generate timing signals

18 Applications of Counters (4)
Generate clocks of different frequencies

19 Network of Counters Basic approaches of interconnection
Cascade counters To get longer period Parallel counters To get more states

20 Cascade Counters

21 Parallel Counters Design a modulo-504 counter 504=7x8x9
000, 111, 222, 333, 444, …

22 Design Using Binary Counters
Typical Problems: Given a modulo-p counter, implement: modulo-k (up) counter, where 1  k  p a-to-b counter, where 1  a < b  p modulo-k down counter up/down modulo-k counter any sequential systems Basic approach: Try to design the “glue logic” around the basic counter: How to perform initialization How to detect a state How to skip a state

23 Binary Modulo-16 Counter
CLK LD TC I I2 I1 I0 S3 S2 S1 S0 CNT CLR

24 Design with Modulo-16 Counter
s 4 x I 4

25 Design A Modulo-12 Counter
CLK LD I I2 I1 I0 S3 S2 S1 S0 CNT CLR x S0 S1 S3 TC

26 Design A 1-to-12 Counter S3 S2 S1 S0 CLR x CNT Modulo-16 Counter CLK
LD I I2 I1 I0 S3 S2 S1 S0 CNT CLR x S2 S3 TC

27 Design A Modulo-16 Down Counter
The key observation: Each next state needs to be loaded from parallel inputs I3,I2,I1,I0 when count input is 1. Modulo-16 Counter CLK LD I I2 I1 I0 S3 S2 S1 S0 CNT CLR x Comb. Logic TC(-) S3 S2 S1 S0 x

28 A Modulo-16 Down Counter - Cont.
Function Table: Inputs: S3, S2, S1, S0, and x Outputs: I3,I2,I1,I0, and TC(-) S3 S2 S1 S0 I3 I2 I1 I0 TC(-) x = 0 S3 S2 S1 S0 I3 I2 I1 I0 TC(-) x = 1 What about a Modulo-12 down counter?

29 Design A Up/Down Modulo-16 Counter
Need to introduce mode control inputs: (x,y)=(1,0)  Up (x,y)=(0,1)  Down x = y, do not change Modulo-16 Counter CLK LD I I2 I1 I0 S3 S2 S1 S0 CNT CLR x y x y Comb. Logic TC(+) TC(-) S3 S2 S1 S0 x’y

30 Design Any Sequential Systems
Key steps: Obtain the transition tables Design the combinational logic

31 Example 1 Using a modulo-16 counter, implement a counter with the following periodical sequence: 0, 2, 5, 6, 7, 9, 10, 12, 13, 15 Modulo-16 Counter CLK LD I I2 I1 I0 S3 S2 S1 S0 CNT CLR x Comb. Logic TC S3 S2 S1 S0 x

32 Example - Cont. x = 0 x = 1 S3 S2 S1 S0 I3 I2 I1 I0 TC

33 Summary Chapter 11 Counter

34 Next Lecture Chapter 12 - ROM Final Review Course Evaluation


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