1. CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 9
February 9
W’05
Yutao He
4532B Boelter Hall

2. Outline Administrative Matter Wrap-up: Chapter 10: Computer Arithmetic
Analysis of Combinational Networks
Chapter 10: Computer Arithmetic
The VHDL Primer
Summary

3. Administrative Matter
Guiz #2
Is graded and will be handed back during the break
Does discose some problems
About VHDL Project #1
Will be posted Tomorrow
Will be due on Feb. 22
Some helpful materials (FAQs, etc) are available on-line
About Midterm
Will be held next Friday
Details will be given in the next lecture
Discussion on next week
Will be held on Wednesday

4. Analysis of Comb. Systems - Recap
Implementation
Specification
Analysis
Functional analysis
What does a system do? Functional equivalence
Timing analysis
How fast does an implementation perform?

5. Example 5 (Cont’d) The Critical Path: - number of gates: level
- types of gates
- fan-ins
O1->N1->A2->O2->N2->A9->O5
Is the brown path a critical path?
The number of levels: 7

6. Example 5 (Cont’d) LH HL HL LH HL
Transition Direction: HL LH LH LH

7. Example 5 (Cont’d)
Network (Propagation) Delays:

8. Example 5 (Cont’d)
Network (Propagation) Delays:

9. Computer Arithmetic - Motivation
Arithmetic circuits are excellent examples of combinational logic design
Time and space tradeoffs
Doing things fast requires more logic and thus more space
Example: carry-lookahead logic
Arithmetic circuits are critical components of a microprocessor
Example: ALUs (Arithmetic Logic Units)
Inner-most "loop" of most computer instructions

10. Computer Arithmetic - Overview
Representation of signed integer
Signed and Magnitude
One’s Complement,
Two’s Complement
Arithmetic operations
Addition
Subtraction
Multiplication, etc.
Arithmetic modules
Adders
Multipliers
ALUs, etc.

11. Number System Revisited
Integer
Fraction
Positive
negative
Number
Negative
Chap 10
Chap 2

12. Representation of Negative Integers
Major schemes:
Sign-and-Magnitude (SM)
True-and-Complement (TC)
One’s complement
Two’s complement
Primary differences:
How to decide (detect) a sign?
How many integers can it represent?
How to represent zero?
How to perform addition and subtraction?
How to detect overflow?

13. Sign-and-Magnitude (SM) System
A signed integer x is represented by the pair (xs, xm)
Sign xs:
Positive (+): xs = 0
Negative (-): xs = 1
Magnitude xm:
Can be treated as a positive integer
Range of signed integers with n-bit vectors
1-bit sign and (n-1) bits magnitude
-(2n-1-1)  x  2n-1-1
Representation of zero 0
xs = 0, xm = 0 (positive zero)
xs = 1, xm = 0 (negative zero)

14. SM System - Examples Represent +12 in binary number
4+1 = 5 bits are required
magnitude is found by using positional number system formula
Result: 01100
Represent -4 in binary number:
Result: 10100

15. True-and-Complement (TC) System
A signed integer x is represented by a positive integer xR, which is in turn encoded with a bit vector x
Sign:
Positive (+): true form
Negative (-): complement form
No separated representation for sign and magnitude TC
System
Conventional
Binary Code
Signed integer x
Positive integer xR
Bit vector
Mapping 1
Mapping 2

16. Mappings Mapping 1: Mapping 2: General formula: Two common TC systems:
xR = x mod C =
where C is called the complement constant
Two common TC systems:
One’s Complement: C = 2n-1, n is number of bits
Two’s complement: C = 2n, n is number of bits
Mapping 2:
Use the positional number system formula
x if x  0 (true form)
C + x if x < 0 (complement form)

17. One’s Complement System
C = 2n-1
Range of signed integers with n-bit vectors:
-(2n-1-1)  x  2n-1-1
Two representations of zero 0
xR = 0
xR = 2n-1
a.k.a. Digit Complement (DC)
True form
Complement form
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001 +0 +1 +2 +3 +4 +5 +6 +7 -7 -6 -5 -4 -3 -2 -1 -0

18. 1’s Complement System - Examples
Represent +12 in binary number:
4+1 = 5 bits are required
it is in true form (positive)
result: +12 => 01100
Represent -12 in binary number:
It is in complement form (negative)
the complement constant C = 25-1 = 31
the complement is = 19
19=> 10011
result: -12 => 10011
Shortcut Method for getting one’s complement:
Get the binary code for |x|
Complement the code bit-wise

19. Two’s Complement System
C = 2n
Range of signed integers with n-bit vectors:
-2n-1  x  2n-1-1
One representations of zero 0
xR = 0
a.k.a. Range Complement (RC)
True form
Complement form
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001 +0 +1 +2 +3 +4 +5 +6 +7 -8 -7 -6 -5 -4 -3 -2 -1

20. 2’s Complement System - Examples
Represent +12 in binary number:
4+1 = 5 bits are required
it is in true form (positive)
result: +12 => 01100
Represent -12 in binary number:
it is in complement form (negative)
the complement constant C = 25= 32
the complement is = 20
20=> 10100
result: -12 => 10100
Shortcut Method for getting two’s complement:
Get the binary code for |x|
Complement the code bit-wise +1

21. Converting a bit vector to a signed integer
For SM system:
Find out the magnitude xm from right (n-1) bits
Decide the sign from the left most bit
Example:
=> 26
1 => “-”
result: -26

22. Converting a bit vector to a signed integer
For One’s Complement (DC) system:
Decide if it’s in true or complement form from the left most bit
If it’s in true form, no complementation is required
If it’s in complement form, take bit-wise complement
Find out the magnitude from the resulting bit vector
Example:
1=> in complement form => it represents a negative integer
Bit-wise complement: =>
=> 37
Result: -37

23. Converting a bit vector to a signed integer
For Two’s Complement (RC) system:
Decide if it’s in true or complement form from the left most bit
If it’s in true form, no complementation is required
If it’s in complement form, take bit-wise complement+1
Find out the magnitude from the resulting bit vector
Example:
1=> in complement form => it represents a negative integer
Bit-wise complement+1: => =>
=> 38
Result: -38

24. Addition/Subtraction: SM System4
+ 3 7
0100
0011
0111 -4
+ (-3) -7
1100
1011
1111
result sign bit is the
same as the operands'
sign
when signs differ,
operation is subtract,
sign of result depends
on sign of number with
the larger magnitude 4
- 3 1
0100
1011
0001 -4
+ 3 -1
1100
0011
1001

25. Addition/Subtraction: 1’s Comp. System4
+ 3 7
0100
0011
0111 -4
+ (-3) -7
1011
1100
10111 1
1000
End around carry 4
- 3 1
0100
1100
10000
0001
End around carry -4
+ 3 -1
1011
0011
1110

26. Addition/Subtraction: 2’s Comp. System4
+ 3 7
0100
0011
0111 -4
+ (-3) -7
1100
1101
11001
throw away
If carry-in to sign =
carry-out then ignore
carry 4
- 3 1
0100
1101
10001
throw away -4
+ 3 -1
1100
0011
1111
Simpler addition scheme makes two’s complement the most common
choice for integer number systems within digital systems

27. Overflow Detection Numbers can be represented in computers are limited
32-bits => over 4 billions unique numbers
An Overflow occurs when an arithmetic operation results in a number outside the range of those that can be represented
Addition
Subtraction
Multiplication
It is desirable to detection the occurrence of an overflow
It depends on number systems that are used

28. Overflow Detection (Cont’d)
Add two positive numbers to get a negative number
or two negative numbers to get a positive number -1 +0 -1 +0 -2
1111 -2
0000 +1
1111
0000 +1
1110
1110 -3
0001 -3
0001 +2 +2
1101
1101
0010
0010 -4 -4
1100 +3
0011
1100 +3
0011 -5 -5
1011
1011
0100 +4
0100 +4
1010 -6
1010
0101 -6
0101 +5 +5
1001
1001
0110
0110 -7 +6 -7
1000 +6
0111
1000
0111 -8 +7 -8 +7
5 + 3 = -8
= +7

29. Overflow Condition (Cont’d)5 3 -8 -7 -2 7
Overflow
Overflow -3 -5 -8 5 2 7
No overflow
No overflow
Overflow occurs when carry in to sign does not equal to carry out

30. Multiplication/Division by 2
Multiplied by 2
Left shift
Example: 0010 => 2, 0100=> 4
Divided by 2
Right shift
Example: 0010=>2, 0001=> 1

31. Range Extension To extend the length of a bit vector Examples:
Extend the left-most bit
Copy the same value as the left-most bit
Examples:
0100 =
1100 =

32. Summary of Basic Arithmetic Operations
Addition:
Take care of the carry-out
Subtraction:
Addition + complementation
Multiplication with 2:
Left shift
Division with 2:
Right shift

33. CAD Design and VHDL Projects
The small projects intend to get you familiar with state-of-art/state-of-practice in electronic industries
Will be using CAD (compute-aided-design) software for logic design
Why Use an HDL (Hardware Description Language)?
Design Level
Digital Design Productivity
(Gates/Week)
Behavioral HDL
2K-10K
RTL HDL
1K-2K
Gates
Transistors
10-20

34. Design Flow of MAX+plus II and VHDL
Coding
Compilation
Simulation
Text
Editor
VHDL
Compiler
Simulator
Waveform
Editor

35. Text file (e.g., simplelogic.vhd) Architecture Definition
VHDL Program Structure
Text file (e.g., simplelogic.vhd)
Entity Declaration
Architecture Definition

36. Net List - Structural Specification
A gate list
A connection list

37. Timing Diagram
Specifies the dynamic behavior of a system

38. Some Tips on Use of MAX+PLUS II
Count-to-Three Principle
If you cannot think of three ways to abuse a tool, you don’t really understand it.
To master a tool, you’ve got to know its weakness and fool around it with fun
Keep Lab notebook
Time-stamp + events
What have you done so far?
What problem did you run into?
How did you work it around?
FAQs (Frequently Asked Questions):
Help each other
Ask questions
Prepare answers

39. Summary Representation of negative numbers Basic arithmetic operations
VHDL Primer

40. Next Lecture Finish up Chapter 10 Midterm Review
Design of arithmetic modules
Midterm Review