1. ECE 352 Digital System Fundamentals
Operation of a Basic Processor
In this video, we will look at the operation of a basic processor.

2. Stored Program Computer
For many systems, we want fixed control of the datapath
Most circuits we have designed thus far…
However, we may want a more flexible machine
Perform different computations by using different sequences of control words with a “generic” datapath
Instructions
Binary words containing datapath/control information
Stored in memory
Decoded into datapath control words to direct the datapath to perform the required operation
A program is a sequence of instructions that are used to accomplish some task(s)
For many designs, we are solving a single problem, so we design a control unit that is hardwired to make the associated datapath perform that one task. For other situations, we need a more flexible machine – one that can perform different tasks at different times. We create a datapath capable of performing the individual steps required by each task, and create a flexible control unit that commands the datapath to perform different sequences of operations based on the current task. In particular, we design the control unit so that its behavior is determined by a sequence of instructions located in memory. The control unit decodes each instruction to determine what it should command the datapath to do. We call that sequence of instructions a program – the instructions dictate the behavior of the control unit, which in turn dictates the behavior of the datapath.

3. Stored Program Computer
The program is stored in memory, usually one instruction per memory location
A program counter (PC) is a special register that holds the address of the next instruction
The PC has counting logic, parallel load and other logic to permit changes in the instruction sequence
The PC may be incremented (next instruction), or modified by certain instructions
Branch, Jump, Return from Subroutine, etc.
Flow control instructions may conditionally or unconditionally update the PC
Can depend on datapath flag outputs: “Branch if Zero”
In order to keep track of which instruction in the sequence it should execute at any given time, the control unit contains a special register called the Program Counter, or PC for short. The program counter typically has the ability to increment to the next address, or do a parallel load of a different memory address in order to provide the ability to change the instruction sequence—in many cases based on status information from the datapath. As each instruction is performed, the PC increments to point to the next instruction in memory—unless that instruction loads the PC with a different memory address. Instructions that can modify the PC are called flow control instructions, since they can alter the order in which instructions are executed—the flow of the program. They may unconditionally force the PC to a new value, or alter the PC only when a certain condition is true.

4. Operation of Processor (approx.)
Read the instruction at the memory address stored in the PC
PC register contains the ADDRESS of the instruction
Still need to fetch the instruction itself from memory
Commonly referred to as “fetching” the instruction
Based on the instruction, either…
Perform a calculation & store the result
Update the PC (with or without condition)
If the PC was not updated, increment it to point to the next instruction in memory
Repeat
The basic operation of a processor is fairly simple in concept, although it quickly gets more complicated when implemented in reality. The processor must read the next instruction from memory. The PC contains the address of the next instruction, and the processor uses this address to read from the instruction memory. We call this an instruction fetch. Based on the instruction fetched from memory, the processor will either perform some operation, or update the PC to some value. If the PC was not updated by the instruction, the PC is incremented to point to the next instruction in the program. This cycle then repeats indefinitely until the machine is powered off.

5. Example Simple Processor
DATA MEMORY
Here we again show the block diagram of our example simple processor. Remember that the instructions are stored in the instruction memory in the control unit. The control unit also contains the instruction decoder, which, based on the fetched instruction, generates the control signals that control the datapath and the data memory.
CONTROL
Example Simple Processor
DATAPATH

6. An Instruction Generally a single micro-operation
Each instruction is very simple compared to the complete program
Compilers convert high-level language programs into long sequences of instructions
Code like this actually represents many instructions: if (A < B) C = D + E + F + G; else C = H * (J + K) / L;
Some instructions (not all of them) also set single-bit flags that are used by other instructions
“Was the most recently calculated result zero?”
“Was the most recently calculated result negative?”
Each instruction normally corresponds to a single microoperation, so each instruction is very basic compared to an entire program. When we write programs in a high-level language, the complier will convert our code into a long sequence of instructions. One line of code in a high-level language usually corresponds to many instructions. Some instructions may cause status flags to be set in the datapath, which indicate some characteristic about the most recent operation and its result. These flags can then be used by flow control instructions to conditionally update the PC.

7. Instruction Formats Instructions divided into bit groups called fields
Each field contains a specific instruction part
Operation code (opcode)
An n-bit opcode can specify up to 2n different operations
Operand(s)
Registers, Memory addresses, Constant data
Operands may be specified implicitly as well
An “increment” instruction implies a 1 as an operand
The instruction type (indicated by the opcode) determines how other bits should be interpreted
Don’t memorize these
Formats are specific to a processor type
In this class we will give you the formats if you need them
The instructions themselves are organized in groups of related bits called fields. Each field specifies a part of the instruction, such as the opcode and the operands. The opcode is the key field in the instruction – based on the opcode, we know how to interpret the rest of the instruction. Of course, you shouldn’t try memorize instruction formats or opcodes – that information will be available to you.

8. Instruction Formats: ALU Ops
The opcode field determines what the actual register transfer operation will be
Instruction includes destination register address and information about source operands
First operand is a register, second is a register for some opcodes, but an “immediate” for others
Immediate operands are data constants contained within the instruction
Only 3 bits fit here, so must be sign-extended or zero-filled
Clever encodings enable wider immediate values (this is beyond the scope of this class)
In our example processor, the opcode is the 7 most significant bits of the 16-bit instruction. For instructions that specify an ALU operation, it identifies the specific operation to be performed. The instruction also indicates the destination register and the source operand(s). The first operand is always a register, but the second operand may be a register, a value coded into the instruction itself, or the field may be ignored, depending on the instruction. Values coded into the instruction are called immediate operands, because they are immediately available from the instruction. By comparison, a register operand is specified by a register address, and the actual operand value must be obtained from that register by reading it from the register file. In our example processor, immediate operands are only three bits, so they must be extended to 16 bits before being used in calculations.

9. Instruction Formats: Control Flow
Changes in program flow caused by jump or branch instructions (affects only PC)
Jump unconditionally loads the PC from source register A
Branch conditionally adds a sign-extended 6-bit offset (AD) to PC
Conditional branch is based on the state of a datapath flag value (i.e. Z, N, C, V)
The processor’s control flow instructions affect only the PC. A jump instruction unconditionally loads the PC with value in a specified register. A branch instruction adds a sign-extended 6-bit offset value to the PC when a specified condition is true. If the condition is false, the PC is simply incremented to the next instruction in sequence like it would have been for any of the ALU instructions. Note that an ISA may have several instruction formats; we only showed two of them for our example processor. Even in this simple example processor we need at least one more instruction format for data movement instructions, which allow information to be read from or written to data memory.

10. Instruction Specifications
Part of the ISA
Describe in detail each instruction the system can execute
Operations, operands, flags set (if any)
A mnemonic is used by the programmer to represent the opcode in text
An assembler then generates the actual binary instruction
The instruction specifications are part of the ISA, and describe in detail the operations, the operands, and any other effects of the instruction. Normally the specification describes an instruction both textually and as an RTL statement. Each instruction is assigned a mnemonic that is used in assembly language instead of the opcode. An assembler then converts each assembly language instruction into a binary instruction word that must loaded into the instruction memory.

11. Example Instruction Specification
Here is the instruction specification for our example processor. Pause here to look at the types of instructions our processor can execute. Again, you shouldn’t try to memorize these instructions or how they are encoded – instead, you should know how to interpret a specification like this one.

12. Executing Instructions
The control unit fetches and decodes the instruction
From that, it generates control signal values
These values make the datapath do what the instruction indicates should happen
To execute a program, the processor control unit fetches and decodes each instruction. The output of the instruction decoder generates control signals that configure the datapath to perform the operation indicated by the instruction.

13. Single-Cycle Hardwired Control
Each instruction completed in a single cycle
PC addresses instruction memory
Value read from that address is sent to the instruction decoder
In many processors, a special “instruction register” is used to hold the fetched instruction
Instruction decoder provides the control word to the datapath
Also determines how PC is updated
PC updated each clock cycle
Repeats indefinitely…
In our example processor, a single instruction is executed each and every clock cycle. The value in the PC is used to address the instruction memory. The value from that address is applied to the instruction decoder. In most processors, the fetched instruction is actually placed an instruction register to hold its value while the instruction is completed. This allows for instructions to take more than one clock cycle to complete. The instruction decoder determines the control word based on the binary values in each field of the instruction. The control word configures the datapath to perform the desired operation, and affects how the PC will be updated. The PC is updated every clock cycle. For most instruction types, it is simply incremented to point to the next instruction in the instruction memory. However, flow control instructions may load a new value into the PC to change the flow of execution. This process repeats indefinitely, with one instruction executed each cycle, until the machine is powered off.

14. Control Word
Several bits of the control word are related to flow control instructions
PL: if 0, the PC increments, else updated based on JB
JB: if 0, do conditional branch, else unconditional jump
BC: if 0, do BRZ, else do BRN
The concatenated offset field is sign-extended
Allows for PC-relative addressing (go 2 words ahead, 3 words back, etc.)
MW: if 1, will write to external memory
The instruction’s immediate field is zero-extended and sent to the datapath
Several bits of the control word do NOT go to the datapath. Three bits in the example processor’s control word are related to the flow control instructions. Bit PL is one when executing a Jump or Branch instruction that might load the PC with a new value. Bit JB is 0 for conditional branch instructions, and 1 for unconditional Jump instructions. Bit BC indicates which datapath status flag should be used to determine if a conditional branch should be taken or not. The offset field used in the Branch instructions is sign-extended to 16-bits, so it can be added to the PC if a branch is taken. Since it is 2’s-complement value, it allows a branch to move forward or backward through the program.
The control word also affects the operation of the data memory. The MW bit is the data memory write enable, so this bit will only be 1 when the processor is executing a store instruction. The value of the immediate operand is sent from the binary instruction to the datapath, but is zero-extended to a 16-bit unsigned value so that it can be processed by the function unit or used as the data for a memory write.

15. Example Simple Processor
DATA MEMORY
Real processors are much more complex than our example. Even in our example, there are some important things missing, like how the instructions would get into the instruction memory to start with. Nonetheless, it conveys the basic principles at work in any processor. If you continue on in the computer architecture field, you’ll have many more courses in which you will explore the complexities of processor design.
CONTROL
Example Simple Processor
DATAPATH

16. ECE 352 Digital System Fundamentals
Operation of a Basic Processor
This concludes our video on basic processor operation.