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Welcome to Systems Software

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1 Welcome to Systems Software
The purpose of this course is to provide background in fundamental types of system software, particularly assemblers, loaders, macro processors, and linkage editors. The course uses a simplified instructional computer (SIC and SIC/XE) to illustrate machine level system software requirements.

2 Welcome to Systems Software
A major objective of the course will be for students to design and implement a working assembler for SIC/XE. (SIC extended)

3 Program Distinction Application programs Systems programs
Machine independent Solves a specific problem Systems programs Machine dependent Support computers operation Compiler Assembler Linker Loader OS

4 Application Programs C/C++, Java, Perl, Python, Fortran, PL/1, LISP, Prolog, Pascal, C#, Ruby, Erlang, Clojure, etc. Programs to sort, search, etc.

5 Systems Programs Compiler Assemblers Linkers Loaders OS
Translates application programs to intermediate code Assemblers Translates intermediate code to machine code Linkers Links the machine code modules into one Loaders Loads the machine code in memory OS Controls the operation of the computer (provides an interface between the hardware and the user)

6 Example Assembler Program - SIC
LDA FIVE Load 5 into register A STA ALPHA Store in location ALPHA LDCH CHARZ Load character ‘Z’ into A STCH C1 Store in C1 . ALPHA RESW 1 one word variable FIVE WORD 5 one word constant CHARZ BYTE C’Z’ one byte constant C1 RESB 1 one byte variable

7 Example Assembler Program – SIC/XE
LDA #5 Load 5 into register A STA ALPHA Store in ALPHA LDCH #90 Load character ‘Z’ into A STCH C1 Store in C1 . ALPHA RESW 1 one word variable C1 RESB 1 one byte variable

8 SIC / SICXE Simple Instruction Computer
Simple Instruction Computer Extended Designed to be similar to real computers Is a virtual machine Designed to avoid unnecessary detail

9 CHARACTERISTICS OF SIC
Bytes – 8 bits Word – 3 bytes (24 bits) Byte addressable Words addressed by lowest byte 32767 (215) bytes of total memory

10 Characteristics of SIC (cont.) SIC Architecture - Registers
Each a full word Each special purpose

11 Register Names and Usage - SIC
A Accumulator; used for arithmetic X Index register; used for addressing L Linkage resister; used for return address PC 8 Program counter; address of next inst. SW 9 Status word; variety of information including a condition code (CC)

12 Data Formats - SIC Integers – 24 bit binary 2’s complement
Characters – 8 bit ASCII No floating point

13 Data Formats Example Integer Character A 01000001 R 01010010
Character A R

14 Instruction Formats - SIC
24 bit LDA FIVE 00011A assuming FIVE is at address 11A in binary This is where we are going, it will all be explained 8 bit opcode bit addressing mode bit address

15 Addressing Modes - SIC Direct x = 0 Target address = address
Indexed x = 1 Target address + (X) (X) is the contents of register X LDA FIVE not indexed or LDA FIVE,X indexed, like an array

16 Instruction Set – SIC see text for a complete list
Load and Store Registers LDA, LDX, STA, STX, etc. Integer Arithmetic (all involve register A) Add, SUB, MUL, DIV Compare COMP – compares A with a word in memory Sets the CC in the SW Jump instructions JLT, JEQ, JGT – based on the CC as set by COMP Subroutine Linkage JSUB – jumps to subroutine, places return address in L RSUB – returns, using the address in L

17 Input/Output - SIC TD – test device is ready to send/receive data
CC of < means device is ready CC of = means device is not ready RD – read data, when the device is ready WD – write data Transfers 1 byte at a time to or from the rightmost 8 bits of register A. Each device has a unique 8-bit code as an operand.

18 CHARACTERISTICS OF SIC/XE

19 SIC/XE Architecture - Memory
Bytes – 8 bits Word – 3 bytes (24 bits) Byte addressable Words addressed by lowest byte 1 meg (220) bytes of total memory (more memory leads to a change in instruction formats and addressing modes

20 SIC/XE Architecture - Registers
5 registers of SIC + 4 additional Each a full word

21 Register Names and Usage – SIC and SIC/XE
A Accumulator; used for arithmetic X Index register; used for addressing L Linkage resister; used for return address PC 8 Program counter; address of next inst. SW 9 Status word; variety of information including a condition code (CC)

22 FOUR Additional Registers and their Usage SIC/XE
B Base register, used for addressing S General register – no special use T 5 General register – no special use F 6 Floating-point accumulator (48 bits)

23 Data Formats – SIC/XE Integers – 24 bit binary 2’s complement
Characters – 8 bit ASCII Floating point – 48 bit floating point

24 1 bit sign 11 bit exponent 36 bit fraction
Data Formats – SIC/XE 24 bit integer 48 bit floating point 1 bit sign 11 bit exponent bit fraction

25 Floating Point Format SIC/XE
Fraction is a value between 0 and 1 The binary point is immediately before the high order bit which must be 1 The exponent is an unsigned binary number between 0 and 2047

26 Floating Point (cont) SIC/XE
Suppose the exponent is e and the fraction is f The number is f * 2 (e+1024) 0 sign is positive 1 is negative 0 is all bits including sign are 0

27 Data Formats Example Integer Character A 01000001
5 = -5 = Character A

28 Data Formats Example Float 4.89 = .1001110001111010111000010100011110
* (1027) =

29 Data Formats Example Float -.000489 = .100000000011000000
* (1014) =

30 Instruction Formats – SIC/XE
Format bit (1 byte) Format 2 – 16 bit (2 bytes) ADDR T,A R2 <- (R2) + (R1) 9050 8 bit opcode 8 bit opcode bit R1 reg bit R2 reg

31 Instruction Formats – SIC/XE
Format bit (3 byte) SUB N A <- (A) – (N) 1F2051 Opcode ni xbpe pc rel address 6 bit opcode n i x b p e bit displacemnt

32 Instruction Formats – SIC/XE
Format 4 – 32 bit (4 bytes) +ADD SEC A <- (A) + (M..M+2) 1B100159 Opcode ni xbpe address 6 bit opcode n i x b p e bit address

33 Addressing Modes – SIC/XE Format 3/4 Instruction
Base relative b=1,p=0 TA = (B)+disp 0 <= disp <= 4095 disp is a n unsigned integer PC relative b=0,p=1 TA = (PC)+disp -2048 <= disp <= 2047 disp is a 2’s complement integer Parenthesis indicates “the contents of” if b=0, p=0 then disp is an absolute address

34 Addressing Modes – SIC/XE Format 3/4 Instruction (cont)
Any addressing mode can be combined with indexed addressing. i.e. if bit x is a 1 then (X) is added in the target address calculation. Again, the parenthesis indicates contents of, i.e. (X) is the contents of register X

35 Addressing Modes – SIC/XE Format 3/4 Instruction the disp (cont)
Immediate addressing i = 1, n = 0 the address itself is the operand, no memory reference Indirect addressing i = 0, n = 1 the word at the location is fetched as the address for the instruction Simple addressing i = n = 0 the target address is taken as the operand e = 0 implies format 3, e = 1 implies format 4

36 Instruction Set – SIC/XE
Load and Store Registers LDA, LDX, STA, STX, LDB, STB, RMO Integer Arithmetic (all involve register A) Add, SUB, MUL, DIV, ADDF, SUBF, MULF, DIVF, ADDR, SUBR, MULR, DIVR Compare COMP – compares A with a word in memory Sets the CC in the SW Jump instructions JLT, JEQ, JGT – based on the CC as set by COMP Subroutine Linkage JSUB – jumps to subroutine, places return address in L RSUB – returns, using the address in L

37 Input/Output – SIC/XE TD – test device is ready to send/receive data
CC of < means device is ready CC of = means device is not ready RD – read data, when the device is ready WD – write data Transfers 1 byte at a time to or from the rightmost 8 bits of register A. Each device has a unique 8-bit code as an operand. I/0 channels – SIO, TIO, HIO

38 Summary Addressing Modes
e = 0 – Format 3 instruction e = 1 – Format 4 instruction

39 Summary Addressing Modes
Direct Addressing – b = p = 0 TA = disp Relative Addressing – b = 1, p = 0 TA = (B) + disp b = 0, p = 1 TA = (PC) + disp

40 Summary Addressing Modes
Immediate i = 1, n = 0 Target address itself is used as the operand value Indirect i = 0, n = 1 Value contained in the word is the address

41 Summary Addressing Modes
Simple i = n = 0 TA is the location of the operand SIC/XE instruction i = n = 1 TA is determined by other bits


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