1. Basic MIPS Implementation
Here's an updated view of the basic architecture needed to implement a subset of the MIPS environment:
We've seen how most of the necessary components can be implemented.
The control logic is needed to manage execution of instructions remains.
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

2. Control Selecting the operations to perform (ALU, read/write, etc.)
Controlling the flow of data (multiplexor inputs)
Information comes from the 32 bits of the instruction:
add $8, $17, $18
100000
00000
01001
10010
10001
000000
funct
shamt rd rt rs op
ALU's operation based on instruction type and function code
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

3. Control
E.g., what should the ALU do with this instruction: lw $1, 100($2)
100011
00010
00001 op rs rt
offset
ALU control input AND OR add subtract set-on-less-than NOR
Why is the code for subtract 0110 and not 0011?
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

4. Computing Instruction Type
Instruction Opcode Type
LW I
SW I
BEQ J
ADD R
SUB R
AND R
OR R
SLT R
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

5. Simplifying: Don't Cares
Instruction Opcode Minimize Type
LW XX0XX I
SW XX0XX I
BEQ XX1XX J
ADD XX0XX R
SUB XX0XX R
AND XX0XX R
OR XX0XX R
SLT XX0XX R
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

6. Computing ALU Settings
Supported
Instruction ALUop Funct ALU Control Settings LW SW
BEQ
ADD
SUB
AND OR
SLT
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

7. Don't Care Conditions Supported
Instruction ALUop Funct ALU Control Settings
LW XXXXXX
SW XXXXXX
BEQ X XXXXXX
ADD X XX
SUB X XX
AND X XX
OR X XX
SLT X XX
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

8. Control Must describe hardware to compute 4-bit ALU control input
given instruction type = lw, sw 01 = beq, = arithmetic
function code for arithmetic
Describe it using a truth table (can turn into gates):
ALUOp
computed from instruction type
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

9. Datapath Details Computer Science Dept Va Tech January 2006
©2006 McQuain WD

10. Datapath Control Line Logic
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

11. Control Simple combinational logic (truth tables)
Computer Science Dept Va Tech January 2006
©2006 McQuain WD

12. Breaking down an instruction
ISA definition of arithmetic: Reg[Memory[PC][15:11]] <= Reg[Memory[PC][25:21]] op Reg[Memory[PC][20:16]]
Could break down to:
IR <= Memory[PC]
A <= Reg[IR[25:21]]
B <= Reg[IR[20:16]]
ALUOut <= A op B
Reg[IR[20:16]] <= ALUOut
We forgot an important part of the definition of arithmetic!
PC <= PC + 4
Computer Science Dept Va Tech January 2006
©2006 McQuain WD