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Intel family of Microprocessors

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1 Intel family of Microprocessors
Special Lecture by Dr. N.Shanmugasundaram, HOD, ECE Department, Sri Eshwar College of Engineering, Coimbatore Dt.

2 Overview of the Presentation
Introduction to Microprocessors Intel 8085 Intel 8086 Programming and 8086 Peripheral ICs Dr.NSS / SECE April 6, 2019

3 Introduction to Microprocessors
Dr.NSS / SECE April 6, 2019

4 An Introduction to Microprocessor
What is a Microprocessor ? An Integrated Circuit (IC) developed using VLSI technology With a complex digital circuit comprising of adders, registers, … Capable of processing given Data According to the Instructions given (program) Dr.NSS / SECE April 6, 2019

5 An Introduction to Microprocessor
A simple Microprocessor based system: Dr.NSS / SECE April 6, 2019

6 An Introduction to Microprocessor
Evolution of Intel Microprocessors Dr.NSS / SECE April 6, 2019

7 An Introduction to Microprocessor
Functional blocks in a Microprocessor: Dr.NSS / SECE April 6, 2019

8 An Introduction to Microprocessor
A typical Microprocessor based system: Dr.NSS / SECE April 6, 2019

9 An Introduction to Microprocessor
Buses: It is a set wires that carries information (eg. Data, Address, Control signal, etc.) Multiplexed Buses: Due to shortage of pins in P IC, functions of few pins are combined and they are called as Multiplexed Bus. Such Buses are separated using ALE signal and a Latch. Dr.NSS / SECE April 6, 2019

10 An Introduction to Microprocessor
Interrupt: It is a signal that stops the execution of current program in microprocessor and transfers the program control to a sub-program related to interrupted device. Hardware Interrupts: A signal sent by an external device to C Software Interrupts: A software instruction for interrupt Dr.NSS / SECE April 6, 2019

11 An Introduction to Microprocessor
Memory & Address lines: Relation between Address lines (N) & Memory capacity is 2N = Memory capacity Addr Lines Memory Capacity 10 (1 Kilo Byte) 11 (2 Kilo Byte) 12 (4 Kilo Byte) 13 (8 Kilo Byte) 14 (16 Kilo Byte) 15 (32 Kilo Byte) 16 (64 Kilo Byte) Dr.NSS / SECE April 6, 2019

12 An Introduction to Microprocessor
Program Counter: 16-bit register holds address of instruction in the program to be executed next. Eg. PC = 4100H in the figure shown Stack: A portion of RAM memory to store data temporarily. Stack Pointer: 16-bit register Holds address of stack top Eg. SP = 5000 H in figure shown Dr.NSS / SECE April 6, 2019

13 An Introduction to Microprocessor
I/O Mapping: It is the process by which address is allocated to I/O devices. The two kinds of mapping are Memory mapped I/O I/O mapped I/O S.No Memory mapped I/O I/O mapped I/O 1 16 bit addr of memory is given to I/O device Separate 8 bit addr is given to I/O device 2 Each I/O device is treated like a memory location and they are accessed using instructions related to memory operations. All I/O devices are accessed using only two instructions viz., IN and OUT. 3 Data can be transferred between I/O devices and all registers in P. I/O devices and accumulator only in P. 4 Only Memory Read & Write machine cycles are involved during data transfer with I/O devices. Only I/O Read & Write machine cycles are involved during data transfer with I/O devices. 5 Large number of I/O devices can be connected in this scheme. Only maximum of 256(=28 ) I/O devices Dr.NSS / SECE April 6, 2019

14 Intel 8085 Dr.NSS / SECE April 6, 2019

15 Intel 8085 Features of Intel 8085: 40-pin DIP chip designed using HMOS
8-bit data and 16-bit address bus With 16-bit address, can access 216 = = 64KB memory locations 8-bit Flag register with 5 flags Operates with power supply of +5 volts and Gnd Max Clock frequency is 12 MHz Dr.NSS / SECE April 6, 2019

16 Intel 8085 Pin Diagram: Dr.NSS / SECE April 6, 2019

17 Intel 8085 Architecture: Dr.NSS / SECE April 6, 2019

18 Intel 8085 Flag register: Dr.NSS / SECE April 6, 2019

19 Register Organization:
Intel 8085 Register Organization: Dr.NSS / SECE April 6, 2019

20 An Introduction to Microprocessor
Interrupt: It is a signal that stops the execution of current program in microprocessor and transfers the program control to a sub-program related to interrupted device. Hardware Interrupts: TRAP RST 7.5 RST 6.5 RST 5.5 INTR Software Interrupts: RST n (n = 0 ~ 7) Dr.NSS / SECE April 6, 2019

21 Intel 8085 Instruction format:
The 8085 has 74 instructions and 246 combinations in it. 8085 instructions size is 1 byte, 2 bytes and 3 three bytes. Each instruction of 8085 has 1 byte opcode. Dr.NSS / SECE April 6, 2019

22 Intel 8085 Addressing Modes:
Every instruction of a program operates on a data. The method of specifying the data to be operated by the instruction is called Addressing. The 8085 has the following 5 different types of addressing. 1. Immediate Addressing Eg. ADI 15H 2. Direct Addressing Eg. LDA 4200H 3. Register Addressing Eg. MOV A, B 4. Register Indirect Addressing Eg. LDAX B 5. Implied Addressing Eg. CMA Dr.NSS / SECE April 6, 2019

23 Intel 8085 Instruction set: Data Transfer Arithmetic Logical Branching
Machine control MOV Rs, Rd MOV M, Rs MOV Rd, M MVI Rd, d8 MVI M, d8 LDA a16 LDAX rp LHLD a16 LXI rp, d16 STA a16 STAX rp SHLD a16 SPHL XTHL XCHG PUSH rp PUSH PSW POP rp POP PSW IN a8 OUT a8 ADD Rs ADD M ADI d8 ADC Rs ADC M ACI d8 SUB Rs SUB M SUI d8 SBB Rs SBB M SBI d8 INR Rs INR M INX rp DCR Rs DCR M DCX rp ANA Rs ANA M ANI d8 ORA Rs ORA M ORI d8 XRA Rs XRA M XRI d8 CMP Rs CMP M CPI d8 RAL RLC RAR RRC CMA CMC STC JMP a16 J<cond> a16 CALL a16 C <cond> a16 RET RETI PCHL RST n EI DI SIM RIM NOP HLT 21 20 19 8 6 Dr.NSS / SECE April 6, 2019

24 Machine Cycles and Timing Diagram:
Intel 8085 Machine Cycles and Timing Diagram: The machine cycles are the basic operations performed by the processor, while instructions are executed. The time taken for performing each machine cycle is expressed in terms of T-states. One T-state is the time period of one clock cycle of the microprocessor. The various machine cycles are 1. Opcode fetch …………… / 6 T 2. Memory Read …………… T 3. Memory Write …………… T 4. I/O Read ………………… T 5. I/O Write ………………… T 6. Interrupt Acknowledge - 6 / 12 T 7. Bus Idle …………………… - 2 / 3 T Dr.NSS / SECE April 6, 2019

25 Instruction Execution & Machine Cylces:
Intel 8085 Instruction Execution & Machine Cylces: Dr.NSS / SECE April 6, 2019

26 Intel 8085 Memory Interfacing:
Draw the circuit diagram of an 8085 system, having a 4 KB EPROM and two 8 KB RAM ICs. The starting address of EPROM is 0000H and RAM is 4000 & 8000H. The address of the decoder circuits should be clearly shown. Solution: EPROM - 4 KB (Address lines required is 12 – A0 to A11 ) RAM-I - 8 KB (Address lines required is 13 – A0 to A12 ) RAM-II - 8 KB (Address lines required is 13 – A0 to A12 ) Dr.NSS / SECE April 6, 2019

27 Intel 8085 Memory Interfacing: Mapping of Addresses to Memory ICs
Binary Address Hex Address A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 EPROM 4 KB . x 1 0000 0001 0FFF RAM-I 8 KB 4000 4001 5FFF RAM-II 8000 8001 9FFF Dr.NSS / SECE April 6, 2019

28 Intel 8085 Memory Interfacing: Dr.NSS / SECE April 6, 2019

29 Intel 8086 Dr.NSS / SECE April 6, 2019

30 Intel 8086 Features: 40 pin DIP IC - HMOS technology 16-bit Data bus
20-bit address bus. More memory addressing capability (220 = 1MB) 16 bit Flag register with 9 Flags Can be operated in Minimum mode and Maximum mode Has two stage pipelined architecture No internal clock generation Operates on +5V supply voltage Has more powerful instruction set Dr.NSS / SECE April 6, 2019

31 Intel 8086 Pin Diagram: Dr.NSS / SECE April 6, 2019

32 Pipelined Architecture:
Intel 8086 Pipelined Architecture: Dr.NSS / SECE April 6, 2019

33 Intel 8086 Architecture: Dr.NSS / SECE April 6, 2019

34 Register Organization:
Intel 8086 Register Organization: Dr.NSS / SECE April 6, 2019

35 Intel 8086 Flag register: Dr.NSS / SECE April 6, 2019

36 Intel 8086 Memory Segmentation: Dr.NSS / SECE April 6, 2019

37 Physical address calculation:
Intel 8086 Physical address calculation: 20-bit physical address of memory is generated by adding the segment address and offset address. Eg. CS = 1234 H IP = H Physical Address = (Segment Address x 10) + Offset = ( 1234 x 10 ) = = H Note: Segment address is left shifted 4 times instead of multiplying by 10. Dr.NSS / SECE April 6, 2019

38 Minimum mode Configuration:
Intel 8086 Minimum mode Configuration: Dr.NSS / SECE April 6, 2019

39 Maximum mode configuration:
Intel 8086 Maximum mode configuration: Dr.NSS / SECE April 6, 2019

40 Intel 8086 Addressing Modes:
Addressing modes for accessing Immediate and Register data. Addressing modes for accessing data in Memory. Addressing modes for accessing I/O ports. Relative Addressing mode. Implied Addressing mode. Dr.NSS / SECE April 6, 2019

41 Intel 8086 Addressing Modes:
1. Addressing modes for accessing Immediate and Register data. (i) Register addressing mode: Eg. MOV BX, CX MOV CL, BL (ii) Immediate addressing mode: Eg. MOV BL, 26H MOV CX, 4567H Dr.NSS / SECE April 6, 2019

42 Intel 8086 Addressing Modes:
2. Addressing modes for accessing data in Memory. (i) Direct addressing mode: Eg. : MOV CX, [9823H] (ii) Register indirect addressing mode: Eg. : MOV CX, [BX] (iii) Based Addressing Mode: Eg. : MOV AX, [BX + 08H] (iv) Indexed Addressing Mode: Eg. : MOV AX, [DI + 08H] (v) Based Indexed Addressing Mode: Eg. : MOV AX, [BX +DI + 08H] (vi) String Addressing Mode: Eg. : MOVS BYTE Dr.NSS / SECE April 6, 2019

43 Intel 8086 Addressing Modes:
3. Addressing modes for accessing Data in I/O Ports. (i) Direct I/O port Addressing Mode: Eg. : IN AL, [09H] (ii) Indirect I/O port Addressing Mode: Eg. : IN AL, [CL] 4. Relative Addressing mode Eg. : JZ 0AH 5. Implied Addressing mode Eg. : CLD Dr.NSS / SECE April 6, 2019

44 The 8086 instruction set is classified as follows.
Intel 8086 Instruction set: The 8086 instruction set is classified as follows. Data Transfer Instructions Arithmetic Instructions Bit manipulation instruction. String instruction. Program execution transfer instruction. Processor control instruction. Dr.NSS / SECE April 6, 2019

45 Data Transfer Instructions:
Intel Data Transfer Instructions: Dr.NSS / SECE April 6, 2019

46 Arithmetic Instructions:
Intel Arithmetic Instructions: Dr.NSS / SECE April 6, 2019

47 Arithmetic Instructions:
Intel Arithmetic Instructions: Dr.NSS / SECE April 6, 2019

48 Bit Manipulation (Logical) Instructions:
Intel Bit Manipulation (Logical) Instructions: Dr.NSS / SECE April 6, 2019

49 Program Execution Transfer Instructions:
Intel Program Execution Transfer Instructions: Dr.NSS / SECE April 6, 2019

50 String Manipulation Instructions:
Intel String Manipulation Instructions: Dr.NSS / SECE April 6, 2019

51 Iteration Instructions:
Intel Iteration Instructions: Dr.NSS / SECE April 6, 2019

52 Process Control Instructions:
Intel Process Control Instructions: Dr.NSS / SECE April 6, 2019

53 External Hardware Synchronization Instructions:
Intel External Hardware Synchronization Instructions: Dr.NSS / SECE April 6, 2019

54 Programming Intel 8085 & 8086 Dr.NSS / SECE April 6, 2019

55 Steps in Programming for a Microprocessor Understand the problem
Intel 8085 & Programming : Steps in Programming for a Microprocessor Understand the problem Device an algorithm for the given problem Identify the instructions that suits for the steps in algorithm Validate the program Verify the results Dr.NSS / SECE April 6, 2019

56 8085 – Programming Exercise #1
Intel 8085 & Programming : 8085 – Programming Exercise #1 Write an ALP for 8085 to multiply two 8-bit numbers. Assume two 8-bit data are in memory locations 4200 & 4201. LOGIC: There is no direct multiplication instruction in So, Multiplication is done through repeated addition Example: 3 x 2 = (3 + 3) or (2+2+2) Take two 8-bit numbers from memory and store it in 2 registers (B & C). Clear Acc and start adding first number for second number of times Store the result (in Acc) in another memory location (4202) Dr.NSS / SECE April 6, 2019

57 Write an ALP for 8085 to multiply two 8-bit numbers.
Intel 8085 & Programming : Write an ALP for 8085 to multiply two 8-bit numbers. LDA 4200 MOV B, A LDA 4201 MOV C, A MVI A, 00 ADD B (Loop) DCR C JNZ Loop STA 4202 HLT Dr.NSS / SECE April 6, 2019

58 Write an ALP for 8085 to divide two 8-bit numbers.
Intel 8085 & Programming #2: Write an ALP for 8085 to divide two 8-bit numbers. Assume data is available in memory location 4200 & 4201. Write a ALP on your own for given flow chart Dr.NSS / SECE April 6, 2019

59 8086 – Programming Exercise #3
Intel 8085 & Programming : 8086 – Programming Exercise #3 Write an ALP for 8086 to find largest number in an array. Assume location 4200 has count (size of array), followed by array elements. LOGIC: 1: Take first number (count) from memory and store it in CL register. 2: Clear Acc 3: start comparing from first array element 4: If array element greater than Acc; copy memory content to Acc or otherwise ignore and go to next step. 5: Decrement count in CL and stop comparing if CL =0 and go to step 7 or otherwise go to next step. 6: Go to next memory location and repeat from step 3 7: Store the result in memory and stop Dr.NSS / SECE April 6, 2019

60 Write an ALP for 8086 to find largest number in an array.
Intel 8085 & Programming : Write an ALP for 8086 to find largest number in an array. MOV CL, [4200] MOV BX, 4201 MOV AL, 00 CMP M, AL (Loop) JC Next MOV AL, [BX] INC BX (Next) DEC CL JNZ Loop MOV 4500, AL HLT Dr.NSS / SECE April 6, 2019

61 8086 – Programming Exercise #4
Intel 8085 & Programming : 8086 – Programming Exercise #4 Write an ALP for 8086 for copying string. ALGORITHM: Start the program. Set the SI to point the source array and DI at destination location. Move the string size to CX register. Direction Flag is cleared so that SI & DI will auto increment after each loop. Move the bytes of the string using MOVSB instruction. Stop the program. Dr.NSS / SECE April 6, 2019

62 Write an ALP for 8086 for copying string.
Intel 8085 & Programming #4: Write an ALP for 8086 for copying string. MOV SI, Source MOV DI, Destination MOV CX, 000AH CLD MOVSB (Next) LOOP Next HLT Dr.NSS / SECE April 6, 2019

63 Peripheral ICs Dr.NSS / SECE April 6, 2019

64 Peripheral ICs and Its Interface
PPI KBD & DISPLAY Controller TIMER ADC DAC CRT Interface Printer Interface Dr.NSS / SECE April 6, 2019

65 Intel 8255 - Programmable Peripheral Interface (PPI)
Intel 8255 is a programmable peripheral interface chip designed for parallel communication between microprocessor and I/O devices, which have a speed mismatch between each other. Features of 8255: It has three 8-bit ports (Port A, B, C) It can be operated in three different modes in I/O mode and in BSR mode The three operating modes in I/O mode are Mode 0 - Simple I/O port Mode l - Handshake I/O port Mode 2 - Bidirectional I/O port. Dr.NSS / SECE April 6, 2019

66 Intel 8255 - Programmable Peripheral Interface (PPI)
Internal block diagram of 8255 The ports are grouped as Group A and Group B. The group A has port A, port Cupper and its control circuit. The group B has port B, port Clower and its control circuit. The Read/Write control logic requires six control signals. Dr.NSS / SECE April 6, 2019

67 Intel 8255 - Programmable Peripheral Interface (PPI)
For operating in I/0 mode; I/O mode - control word is send to control register. The format of the I/0 mode set control word is shown below. Dr.NSS / SECE April 6, 2019

68 Intel 8255 - Programmable Peripheral Interface (PPI)
For setting/resetting (BSR mode) of a pin of port C, the bit set/ reset control word is sent to control register. The format of bit set/reset control word is shown below. Dr.NSS / SECE April 6, 2019

69 Intel 8279 - Keyboard and Display Controller
IC 8279 is a dedicated controller specially developed for keyboard/ display interfacing in 8085/8086/8088 microprocessor based system. It relieves the processor from the following time consuming task like keyboard scanning and display refreshing. Keyboard scanning Key debouncing Key code generation Sending display code to LED Display refreshing The processor time will be utilized, as the above functions have to be performed continuously in specified time intervals. To overcome this problem, the dedicated Keyboard/Display controller such as INTEL 8279 can be employed in the system. Dr.NSS / SECE April 6, 2019

70 Intel 8279 - Keyboard and Display Controller
Features of are Simultaneous keyboard and display operations. 2-Key lockout or N-key rollover with contact debounce. Scanned keyboard mode. Scanned sensor mode. Strobed input entry mode. 8-character keyboard FIFO 16-character display Mode programmable from CPU Dr.NSS / SECE April 6, 2019

71 Intel 8279 - Keyboard and Display Controller
Block diagram of 8279 The functional block diagram of 8279 is shown in figure below. The four major sections of 8279 are keyboard, scan, display and CPU interface. Dr.NSS / SECE April 6, 2019

72 Intel 8279 - Keyboard and Display Controller
Dr.NSS / SECE April 6, 2019

73 Intel 8279 - Keyboard and Display Controller
Dr.NSS / SECE April 6, 2019

74 Intel 8253 - Programmable Interval Timer
The 8253 is a Programmable interval timer/counter. The 8253 includes three identical 16-bit counters that can operate independently in any of the six modes. It is PQC based in a 24 pin o/p and required a single +5v Power Supply. The 8254 is an upgraded version of the 8253 and the pins are compatible. Dr.NSS / SECE April 6, 2019

75 Intel 8253 - Programmable Interval Timer
Dr.NSS / SECE April 6, 2019

76 Intel 8253 - Programmable Interval Timer
MODE 0 - Interrupt on Terminal Count When this mode is set, the output will be low. Loading the count register with a value will cause the output to remain low and the counter will start counting down. When the counter reaches 0 the output will go high and remain high until the counter is reprogrammed. MODE 1 - Programmable One-Shot The output will go low, once the counter has been loaded, and will go high once terminal count has been reached. Once terminal count has been reached it can be triggered again. MODE 2 - Rate Generator It is a standard divide-by-N counter. The output will be low for one period of the input clock then it will remain high for the next period in the counter. This cycle will keep repeating. Dr.NSS / SECE April 6, 2019

77 Intel 8253 - Programmable Interval Timer
MODE 3 - Square Wave Rate Generator Similar to mode 2, except the output will remain high until one half of the count has been completed and then low for the other half. MODE 4 - Software Triggered Strobe After the mode is set the output will be high. Once the count is loaded it will start counting, and will go low once terminal count is reached. MODE 5 - Hardware Triggered Strobe Hardware triggered strobe. Similar to mode 5, but it waits for a hardware trigger signal before starting to count. Modes 1 and 5 require the 8253 gate pin to go ‘high’ in order to start counting. Dr.NSS / SECE April 6, 2019

78 Intel 8253 - Programmable Interval Timer
CONTROL FORMAT: SC1 SC0 RL1 RL0 M2 M1 M0 BCD Dr.NSS / SECE April 6, 2019

79 A/D Converter In many applications, an analog device has to be interfaced to digital system. But the digital devices cannot accept the analog signals directly and so the analog signals are converted into equivalent digital signal (data) using ADC. The first group includes successive-approximation, counter and flash type converters. The second group includes integrator converters and voltage to frequency converters. The trade-off between the two techniques is based on Accuracy Vs Speed. Dr.NSS / SECE April 6, 2019

80 A/D Converter The resolution of the converter is the minimum analog value that can be represented by the digital data. R = Vref / 2N The conversion time is defined as the total time required to convert an analog signal into its digital equivalent. (It depends on the conversion technique and the propagation delay in various circuits). Dr.NSS / SECE April 6, 2019

81 A/D Converter Dr.NSS / SECE April 6, 2019

82 A/D Converter Dr.NSS / SECE April 6, 2019

83 D/A Converter Basically the microprocessor system can produce only digital signals In many applications, the microprocessor has to produce analog signals for controlling certain analog devices. In order to convert the digital signal to analog signal a Digital-to-Analog Converter (DAC) has to be employed. For example, Consider an 8-bit DAC with reference analog voltage of 5 volts. Now the resolution of the DAC is (1/28) x 5 volts. The 8-bit digital input can take, = 256 different values. Dr.NSS / SECE April 6, 2019

84 D/A Converter The switches in the circuit of figure above can be transistors which connects the resistance either to ground or Vref. The resistors are connected in such a way that for any number of inputs, the total current is in binary proportion. The operational amplifier converts the current to a voltage signal V0, which can be calculated from the following equation. Dr.NSS / SECE April 6, 2019

85 D/A Converter Dr.NSS / SECE April 6, 2019

86 D/A Converter The typical settling time of DAC0800 is 150ns.
Dr.NSS / SECE April 6, 2019

87 Thank you For your patience… Dr. N.Shanmugasundaram, ECE Department,
For Queries & Clarifications, Contact Dr. N.Shanmugasundaram, ECE Department, Sri Eshwar College of Engineering, Coimbatore District Dr.NSS / SECE April 6, 2019


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